Cu seeding using electroless deposition on Ru liner for high aspect ratio through-Si vias

Fumihiro Inoue, Harold Philipsen, Marleen H. Van Der Veen, Kevin Vandersmissen, Stefaan Van Huylenbroeck, Herbert Struyf, Tetsu Tanaka

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

High aspect ratio through-Si vias (AR=16.7) filling has been achieved by using non-PVD seed metallization approach. We demonstrate the formation of conformal and thin electroless deposited Cu seed on Ru liner. The optimized ELD Cu process was conducted at room temperature on activated Ru surface, which can improve the ELD bath life time. The deposited Cu with 2,2' bipyridyl shows smoother and higher purity inside the Cu film.

Original languageEnglish
Title of host publication2014 International 3D Systems Integration Conference, 3DIC 2014 - Proceedings
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781479984725
DOIs
Publication statusPublished - 2014 Jan 1
EventInternational 3D Systems Integration Conference, 3DIC 2014 - Kinsdale, Ireland
Duration: 2014 Dec 12014 Dec 3

Publication series

Name2014 International 3D Systems Integration Conference, 3DIC 2014 - Proceedings

Other

OtherInternational 3D Systems Integration Conference, 3DIC 2014
CountryIreland
CityKinsdale
Period14/12/114/12/3

Keywords

  • Cu seed
  • Elecroless deposition
  • High aspect ratio
  • Metallization
  • Through-Si Via

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Electronic, Optical and Magnetic Materials
  • Hardware and Architecture

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    Inoue, F., Philipsen, H., Van Der Veen, M. H., Vandersmissen, K., Van Huylenbroeck, S., Struyf, H., & Tanaka, T. (2014). Cu seeding using electroless deposition on Ru liner for high aspect ratio through-Si vias. In 2014 International 3D Systems Integration Conference, 3DIC 2014 - Proceedings [07152147] (2014 International 3D Systems Integration Conference, 3DIC 2014 - Proceedings). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/3DIC.2014.7152147