Correct reaction neural network and its implementation

Koji Nakajima; Y. Hayakawa; S. Sato; T. Nishimura; Junichi Murota; Y. Sawada

Correct reaction neural network and its implementation

Koji Nakajima, Y. Hayakawa, S. Sato, T. Nishimura, Junichi Murota, Y. Sawada

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

Summary form only given. A novel method has been devised to analyze and to design Hopfield-like neural networks in which globally optimal solutions to specific problems are guaranteed. As the first part of a project to construct practical circuits for massively parallel analog computation, chips containing a 4-b A/D (analog-to-digital) converter have been constructed for demonstration purposes.

Original language	English
Title of host publication	Proceedings. IJCNN - International Joint Conference on Neural Networks
Editors	Anon
Publisher	Publ by IEEE
Number of pages	1
ISBN (Print)	0780301641
Publication status	Published - 1992 Jan 1
Externally published	Yes
Event	International Joint Conference on Neural Networks - IJCNN-91-Seattle - Seattle, WA, USA Duration: 1991 Jul 8 → 1991 Jul 12

Publication series

Name	Proceedings. IJCNN - International Joint Conference on Neural Networks

Other

Other	International Joint Conference on Neural Networks - IJCNN-91-Seattle
City	Seattle, WA, USA
Period	91/7/8 → 91/7/12

ASJC Scopus subject areas

Engineering(all)

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Cite this

Correct reaction neural network and its implementation. / Nakajima, Koji; Hayakawa, Y.; Sato, S.; Nishimura, T.; Murota, Junichi; Sawada, Y.

Proceedings. IJCNN - International Joint Conference on Neural Networks. ed. / Anon. Publ by IEEE, 1992. (Proceedings. IJCNN - International Joint Conference on Neural Networks).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Nakajima, K, Hayakawa, Y , Sato, S, Nishimura, T, Murota, J & Sawada, Y 1992, Correct reaction neural network and its implementation. in Anon (ed.), Proceedings. IJCNN - International Joint Conference on Neural Networks. Proceedings. IJCNN - International Joint Conference on Neural Networks, Publ by IEEE, International Joint Conference on Neural Networks - IJCNN-91-Seattle, Seattle, WA, USA, 91/7/8.

@inproceedings{35cd918e5c584bc1b45c78a387f3809f,

title = "Correct reaction neural network and its implementation",

abstract = "Summary form only given. A novel method has been devised to analyze and to design Hopfield-like neural networks in which globally optimal solutions to specific problems are guaranteed. As the first part of a project to construct practical circuits for massively parallel analog computation, chips containing a 4-b A/D (analog-to-digital) converter have been constructed for demonstration purposes.",

author = "Koji Nakajima and Y. Hayakawa and S. Sato and T. Nishimura and Junichi Murota and Y. Sawada",

year = "1992",

month = jan,

day = "1",

language = "English",

isbn = "0780301641",

series = "Proceedings. IJCNN - International Joint Conference on Neural Networks",

publisher = "Publ by IEEE",

editor = "Anon",

booktitle = "Proceedings. IJCNN - International Joint Conference on Neural Networks",

note = "International Joint Conference on Neural Networks - IJCNN-91-Seattle ; Conference date: 08-07-1991 Through 12-07-1991",

}

TY - GEN

T1 - Correct reaction neural network and its implementation

AU - Nakajima, Koji

AU - Hayakawa, Y.

AU - Sato, S.

AU - Nishimura, T.

AU - Murota, Junichi

AU - Sawada, Y.

PY - 1992/1/1

Y1 - 1992/1/1

N2 - Summary form only given. A novel method has been devised to analyze and to design Hopfield-like neural networks in which globally optimal solutions to specific problems are guaranteed. As the first part of a project to construct practical circuits for massively parallel analog computation, chips containing a 4-b A/D (analog-to-digital) converter have been constructed for demonstration purposes.

AB - Summary form only given. A novel method has been devised to analyze and to design Hopfield-like neural networks in which globally optimal solutions to specific problems are guaranteed. As the first part of a project to construct practical circuits for massively parallel analog computation, chips containing a 4-b A/D (analog-to-digital) converter have been constructed for demonstration purposes.

UR - http://www.scopus.com/inward/record.url?scp=0026626844&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=0026626844&partnerID=8YFLogxK

M3 - Conference contribution

AN - SCOPUS:0026626844

SN - 0780301641

T3 - Proceedings. IJCNN - International Joint Conference on Neural Networks

BT - Proceedings. IJCNN - International Joint Conference on Neural Networks

A2 - Anon, null

PB - Publ by IEEE

T2 - International Joint Conference on Neural Networks - IJCNN-91-Seattle

Y2 - 8 July 1991 through 12 July 1991

ER -