Context-based error correction scheme using recurrent neural network for resilient and efficient intra-chip data transmission

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Citations (Scopus)

Abstract

An error correction scheme utilizing a brain-inspired learning algorithm, called Recurrent Neural Network (RNN), is proposed for resilient and efficient intra-chip data transmission. RNN has a feature to find partially-clustered time-series data stream from an input data stream and predict the next input data from previous input data stream, which can be utilized for realizing an error correction corresponding to the "context" of the data stream. Through the evaluation of intra-chip data transmission in a general-purpose 32-bit microprocessor, it is demonstrated that the proposed scheme performs 95.9% error reduction with 2-times better data transfer efficiency and 94.2% error reduction with 4-times better data transfer efficiency compared with a conventional error correction scheme.

Original languageEnglish
Title of host publicationProceedings - 2016 IEEE 46th International Symposium on Multiple-Valued Logic, ISMVL 2016
PublisherIEEE Computer Society
Pages72-77
Number of pages6
ISBN (Electronic)9781467394888
DOIs
Publication statusPublished - 2016 Jul 18
Event46th IEEE International Symposium on Multiple-Valued Logic, ISMVL 2016 - Sapporo, Hokkaido, Japan
Duration: 2016 May 182016 May 20

Publication series

NameProceedings of The International Symposium on Multiple-Valued Logic
Volume2016-July
ISSN (Print)0195-623X

Other

Other46th IEEE International Symposium on Multiple-Valued Logic, ISMVL 2016
CountryJapan
CitySapporo, Hokkaido
Period16/5/1816/5/20

Keywords

  • context-based error correction
  • deep learning
  • intelligent information processing
  • recurrent neural network

ASJC Scopus subject areas

  • Computer Science(all)
  • Mathematics(all)

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  • Cite this

    Sugaya, N., Natsui, M., & Hanyu, T. (2016). Context-based error correction scheme using recurrent neural network for resilient and efficient intra-chip data transmission. In Proceedings - 2016 IEEE 46th International Symposium on Multiple-Valued Logic, ISMVL 2016 (pp. 72-77). [7515525] (Proceedings of The International Symposium on Multiple-Valued Logic; Vol. 2016-July). IEEE Computer Society. https://doi.org/10.1109/ISMVL.2016.42