Complexity of counting output patterns of logic circuits

Kei Uchizawa, Zhenghong Wang, Hiroki Morizumi, Xiao Zhou

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Let C be a logic circuit consisting of s gates g1, g2, gs, then the output pattern of C for an input x ε {0, 1}n is defined to be a vector (g1(x), g2(x), gs(x)) ε {0, 1}s of the outputs of g1, g2, gs for x. For each f : {0, 1}2 → {0, 1}, we define an f-circuit as a logic circuit where every gate computes f, and investigate computational complexity of the following counting problem: Given an f-circuit C, how many output patterns arise in C? We then provide a dichotomy result on the counting problem: We prove that the problem is solvable in polynomial time if f is PARITY or any degenerate function, while the problem is #P-complete even for constant-depth f-circuits if f is one of the other functions, such as AND, OR, NAND and NOR.

Original languageEnglish
Title of host publicationConferences in Research and Practice in Information Technology Series
EditorsAnthony Wirth
PublisherAustralian Computer Society
Pages37-42
Number of pages6
ISBN (Print)9781921770265
Publication statusPublished - 2013
EventComputing: The Australasian Theory Symposium, CATS 2013 - Adelaide, Australia
Duration: 2013 Jan 292013 Feb 1

Publication series

NameConferences in Research and Practice in Information Technology Series
Volume141
ISSN (Print)1445-1336

Other

OtherComputing: The Australasian Theory Symposium, CATS 2013
Country/TerritoryAustralia
CityAdelaide
Period13/1/2913/2/1

Keywords

  • Boolean functions
  • Counting complexity
  • Logic circuits
  • Minimum AND-circuits problem

ASJC Scopus subject areas

  • Computer Networks and Communications
  • Computer Science Applications
  • Hardware and Architecture
  • Information Systems
  • Software

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