Complementary ferroelectric-capacitor logic for low-power logic-in-memory VLSI

Hiromitsu Kimura, Takahiro Hanyu, Michitaka Kameyama, Yoshikazu Fujimori, Takashi Nakamura, Hidemi Takasu

Research output: Contribution to journalArticle

46 Citations (Scopus)

Abstract

A novel nonvolatile logic style, called complementary ferroelectric- capacitor (CFC) logic, is proposed for low-power logic-in-memory VLSI, in which storage elements are distributed over the logic-circuit plane. Standby currents in distributed storage elements can be cut off by using ferroelectric-based nonvolatile storage elements, and the standby power dissipation can be greatly reduced. Since the nonvolatile storage and the switching functions are merged into ferroelectric capacitors by the capacitive coupling effect, reduction of active device counts can be achieved. The use of complementary stored data in coupled ferroelectric capacitors makes it possible to perform a switching operation with small degradation of the nonvolatile charge at a low supply voltage. The restore operation can be performed by only applying the small bias across the ferroelectric capacitor, which reduces the dynamic power dissipation. Applying the proposed circuitry in a fully parallel 32-bit content-addressable memory results in about 2/3 dynamic power reduction and 1/7700 static power reduction with chip size of 1/3, compared to a CMOS implementation using 0.6-μm ferroelectric/CMOS.

Original languageEnglish
Pages (from-to)919-926
Number of pages8
JournalIEEE Journal of Solid-State Circuits
Volume39
Issue number6
DOIs
Publication statusPublished - 2004 Jun

Keywords

  • Content-addressable memory (CAM)
  • Dynamic logic
  • Ferroelectric capacitor
  • Nonvolatile storage
  • Pass-transistor logic
  • Pseudo non-destructive read operation

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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