Comparative study of tri-gate flash memories with split and stack gates

T. Kamei, Y. X. Liu, T. Matsukawa, K. Endo, S. O'uchi, J. Tsukada, H. Yamauchi, Y. Ishikawa, T. Hayashida, K. Sakamoto, A. Ogura, M. Masahara

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

The functional tri-gate flash memories with splitgate have been demonstrated for the first time, and its V t variabilities before and after one P/E cycle have be systimetically compared with stack-gate ones. It was confirmed that split-gate shows smaller V t distribution after erase and excellent over-erase immunity compared to those of stack-gate. Moreover, it was found that BV DS is higher than 3.2 V even L gc was down to 76 nm. This indictes that tri-gate is useful for scaled NOR flash.

Original languageEnglish
Title of host publicationIEEE International SOI Conference, SOI 2011
DOIs
Publication statusPublished - 2011 Dec 20
Externally publishedYes
Event2011 IEEE International SOI Conference, SOI 2011 - Tempe, AZ, United States
Duration: 2011 Oct 32011 Oct 6

Publication series

NameProceedings - IEEE International SOI Conference
ISSN (Print)1078-621X

Other

Other2011 IEEE International SOI Conference, SOI 2011
CountryUnited States
CityTempe, AZ
Period11/10/311/10/6

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

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