Collision detection processor for intelligent vehicles

Masanori Hariyama, Michitaka Kameyama

Research output: Contribution to journalArticlepeer-review

6 Citations (Scopus)

Abstract

A new obstacle representation based on a union of rectangular solids is also used to reduce the obstacle memory capacity, so that the collision detection can be performed only by parallel magnitude comparison. Parallel architecture using several identical processor elements (PEs) is employed to perform the coordinate transformation at high speed based on the Coordinate Rotation Digital Computation (CORDIC) algorithms. The collision detection-time becomes 5.2 ms using 20 PEs and five CAMs with a 42-kbit capacity.

Original languageEnglish
Pages (from-to)1804-1811
Number of pages8
JournalIEICE Transactions on Electronics
VolumeE76-C
Issue number12
Publication statusPublished - 1993 Dec 1

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

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