Collision detection processor for intelligent vehicles

Masanori Hariyama; Michitaka Kameyama

Collision detection processor for intelligent vehicles

Masanori Hariyama, Michitaka Kameyama

INF - Computer and Mathematical Sciences

Research output: Contribution to journal › Article › peer-review

6 Citations (Scopus)

Abstract

A new obstacle representation based on a union of rectangular solids is also used to reduce the obstacle memory capacity, so that the collision detection can be performed only by parallel magnitude comparison. Parallel architecture using several identical processor elements (PEs) is employed to perform the coordinate transformation at high speed based on the Coordinate Rotation Digital Computation (CORDIC) algorithms. The collision detection-time becomes 5.2 ms using 20 PEs and five CAMs with a 42-kbit capacity.

Original language	English
Pages (from-to)	1804-1811
Number of pages	8
Journal	IEICE Transactions on Electronics
Volume	E76-C
Issue number	12
Publication status	Published - 1993 Dec 1

ASJC Scopus subject areas

Electronic, Optical and Magnetic Materials
Electrical and Electronic Engineering

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@article{9bcf3cf826ba4f1e951ad7fd7dd7a66a,

title = "Collision detection processor for intelligent vehicles",

abstract = "A new obstacle representation based on a union of rectangular solids is also used to reduce the obstacle memory capacity, so that the collision detection can be performed only by parallel magnitude comparison. Parallel architecture using several identical processor elements (PEs) is employed to perform the coordinate transformation at high speed based on the Coordinate Rotation Digital Computation (CORDIC) algorithms. The collision detection-time becomes 5.2 ms using 20 PEs and five CAMs with a 42-kbit capacity.",

author = "Masanori Hariyama and Michitaka Kameyama",

year = "1993",

month = dec,

day = "1",

language = "English",

volume = "E76-C",

pages = "1804--1811",

journal = "IEICE Transactions on Electronics",

issn = "0916-8524",

publisher = "Maruzen Co., Ltd/Maruzen Kabushikikaisha",

number = "12",

}

TY - JOUR

T1 - Collision detection processor for intelligent vehicles

AU - Hariyama, Masanori

AU - Kameyama, Michitaka

PY - 1993/12/1

Y1 - 1993/12/1

N2 - A new obstacle representation based on a union of rectangular solids is also used to reduce the obstacle memory capacity, so that the collision detection can be performed only by parallel magnitude comparison. Parallel architecture using several identical processor elements (PEs) is employed to perform the coordinate transformation at high speed based on the Coordinate Rotation Digital Computation (CORDIC) algorithms. The collision detection-time becomes 5.2 ms using 20 PEs and five CAMs with a 42-kbit capacity.

AB - A new obstacle representation based on a union of rectangular solids is also used to reduce the obstacle memory capacity, so that the collision detection can be performed only by parallel magnitude comparison. Parallel architecture using several identical processor elements (PEs) is employed to perform the coordinate transformation at high speed based on the Coordinate Rotation Digital Computation (CORDIC) algorithms. The collision detection-time becomes 5.2 ms using 20 PEs and five CAMs with a 42-kbit capacity.

UR - http://www.scopus.com/inward/record.url?scp=0027841504&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=0027841504&partnerID=8YFLogxK

M3 - Article

AN - SCOPUS:0027841504

VL - E76-C

SP - 1804

EP - 1811

JO - IEICE Transactions on Electronics

JF - IEICE Transactions on Electronics

SN - 0916-8524

IS - 12

ER -