Circuit partitioning algorithms: Graph model versus geometry model

Tetsuo Asano, Takeshi Tokuyama

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

One of the most important problems in VLSI layout design is a circuit partitioning problem, for which a number of algorithms have been presented. Given a set of modules together with a net list, the problem here is to find an optimal partition of the module set into two so that the areas occupied by modules are comparable in the two sides and the number of interconnections between two sides is minimized. For this problem this paper compares the method based on graph representation with the one of solving the bipartition problem after mapping modules into points in the plane.

Original languageEnglish
Title of host publicationISA 1991 Algorithms - 2nd International Symposium on Algorithms, Proceedings
EditorsR.C.T. Lee, Wen-Lian Hsu
PublisherSpringer Verlag
Pages94-103
Number of pages10
ISBN (Print)9783540549451
DOIs
Publication statusPublished - 1991
Event2nd Annual International Symposium on Algorithms, ISA 1991 - Taipei, China
Duration: 1991 Dec 161991 Dec 18

Publication series

NameLecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
Volume557 LNCS
ISSN (Print)0302-9743
ISSN (Electronic)1611-3349

Other

Other2nd Annual International Symposium on Algorithms, ISA 1991
CountryChina
CityTaipei
Period91/12/1691/12/18

ASJC Scopus subject areas

  • Theoretical Computer Science
  • Computer Science(all)

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