Circuit partitioning algorithms: Graph model versus geometry model

Tetsuo Asano; Takeshi Tokuyama

doi:10.1007/3-540-54945-5_53

Circuit partitioning algorithms: Graph model versus geometry model

Tetsuo Asano, Takeshi Tokuyama

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

1 Citation (Scopus)

Abstract

One of the most important problems in VLSI layout design is a circuit partitioning problem, for which a number of algorithms have been presented. Given a set of modules together with a net list, the problem here is to find an optimal partition of the module set into two so that the areas occupied by modules are comparable in the two sides and the number of interconnections between two sides is minimized. For this problem this paper compares the method based on graph representation with the one of solving the bipartition problem after mapping modules into points in the plane.

Original language	English
Title of host publication	ISA 1991 Algorithms - 2nd International Symposium on Algorithms, Proceedings
Editors	R.C.T. Lee, Wen-Lian Hsu
Publisher	Springer Verlag
Pages	94-103
Number of pages	10
ISBN (Print)	9783540549451
DOIs	https://doi.org/10.1007/3-540-54945-5_53
Publication status	Published - 1991
Externally published	Yes
Event	2nd Annual International Symposium on Algorithms, ISA 1991 - Taipei, China Duration: 1991 Dec 16 → 1991 Dec 18

Publication series

Name	Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
Volume	557 LNCS
ISSN (Print)	0302-9743
ISSN (Electronic)	1611-3349

Other

Other	2nd Annual International Symposium on Algorithms, ISA 1991
Country/Territory	China
City	Taipei
Period	91/12/16 → 91/12/18

ASJC Scopus subject areas

Theoretical Computer Science
Computer Science(all)

Access to Document

10.1007/3-540-54945-5_53

Cite this

Asano, T., & Tokuyama, T. (1991). Circuit partitioning algorithms: Graph model versus geometry model. In R. C. T. Lee, & W-L. Hsu (Eds.), ISA 1991 Algorithms - 2nd International Symposium on Algorithms, Proceedings (pp. 94-103). (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); Vol. 557 LNCS). Springer Verlag. https://doi.org/10.1007/3-540-54945-5_53

Circuit partitioning algorithms : Graph model versus geometry model. / Asano, Tetsuo; Tokuyama, Takeshi.

ISA 1991 Algorithms - 2nd International Symposium on Algorithms, Proceedings. ed. / R.C.T. Lee; Wen-Lian Hsu. Springer Verlag, 1991. p. 94-103 (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); Vol. 557 LNCS).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Asano, T & Tokuyama, T 1991, Circuit partitioning algorithms: Graph model versus geometry model. in RCT Lee & W-L Hsu (eds), ISA 1991 Algorithms - 2nd International Symposium on Algorithms, Proceedings. Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), vol. 557 LNCS, Springer Verlag, pp. 94-103, 2nd Annual International Symposium on Algorithms, ISA 1991, Taipei, China, 91/12/16. https://doi.org/10.1007/3-540-54945-5_53

Asano T, Tokuyama T. Circuit partitioning algorithms: Graph model versus geometry model. In Lee RCT, Hsu W-L, editors, ISA 1991 Algorithms - 2nd International Symposium on Algorithms, Proceedings. Springer Verlag. 1991. p. 94-103. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)). https://doi.org/10.1007/3-540-54945-5_53

Asano, Tetsuo ; Tokuyama, Takeshi. / Circuit partitioning algorithms : Graph model versus geometry model. ISA 1991 Algorithms - 2nd International Symposium on Algorithms, Proceedings. editor / R.C.T. Lee ; Wen-Lian Hsu. Springer Verlag, 1991. pp. 94-103 (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)).

@inproceedings{b6fb2e80b4bf4be791d11a790599dd05,

title = "Circuit partitioning algorithms: Graph model versus geometry model",

abstract = "One of the most important problems in VLSI layout design is a circuit partitioning problem, for which a number of algorithms have been presented. Given a set of modules together with a net list, the problem here is to find an optimal partition of the module set into two so that the areas occupied by modules are comparable in the two sides and the number of interconnections between two sides is minimized. For this problem this paper compares the method based on graph representation with the one of solving the bipartition problem after mapping modules into points in the plane.",

author = "Tetsuo Asano and Takeshi Tokuyama",

note = "Funding Information: *This work was partially supported by Grant in Aid for Scientific Research of the Ministry of Education, Science and Cultures of Japan Publisher Copyright: {\textcopyright} Springer-Verlag Berlin Heidelberg 1991.; 2nd Annual International Symposium on Algorithms, ISA 1991 ; Conference date: 16-12-1991 Through 18-12-1991",

year = "1991",

doi = "10.1007/3-540-54945-5_53",

language = "English",

isbn = "9783540549451",

series = "Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)",

publisher = "Springer Verlag",

pages = "94--103",

editor = "R.C.T. Lee and Wen-Lian Hsu",

booktitle = "ISA 1991 Algorithms - 2nd International Symposium on Algorithms, Proceedings",

}

TY - GEN

T1 - Circuit partitioning algorithms

T2 - 2nd Annual International Symposium on Algorithms, ISA 1991

AU - Asano, Tetsuo

AU - Tokuyama, Takeshi

N1 - Funding Information: *This work was partially supported by Grant in Aid for Scientific Research of the Ministry of Education, Science and Cultures of Japan Publisher Copyright: © Springer-Verlag Berlin Heidelberg 1991.

PY - 1991

Y1 - 1991

N2 - One of the most important problems in VLSI layout design is a circuit partitioning problem, for which a number of algorithms have been presented. Given a set of modules together with a net list, the problem here is to find an optimal partition of the module set into two so that the areas occupied by modules are comparable in the two sides and the number of interconnections between two sides is minimized. For this problem this paper compares the method based on graph representation with the one of solving the bipartition problem after mapping modules into points in the plane.

AB - One of the most important problems in VLSI layout design is a circuit partitioning problem, for which a number of algorithms have been presented. Given a set of modules together with a net list, the problem here is to find an optimal partition of the module set into two so that the areas occupied by modules are comparable in the two sides and the number of interconnections between two sides is minimized. For this problem this paper compares the method based on graph representation with the one of solving the bipartition problem after mapping modules into points in the plane.

UR - http://www.scopus.com/inward/record.url?scp=85031296234&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=85031296234&partnerID=8YFLogxK

U2 - 10.1007/3-540-54945-5_53

DO - 10.1007/3-540-54945-5_53

M3 - Conference contribution

AN - SCOPUS:85031296234

SN - 9783540549451

T3 - Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

SP - 94

EP - 103

BT - ISA 1991 Algorithms - 2nd International Symposium on Algorithms, Proceedings

A2 - Lee, R.C.T.

A2 - Hsu, Wen-Lian

PB - Springer Verlag

Y2 - 16 December 1991 through 18 December 1991

ER -

Circuit partitioning algorithms: Graph model versus geometry model

Abstract

Publication series

Other

ASJC Scopus subject areas

Access to Document

Other files and links

Fingerprint

Cite this