Characterization of 3D stacked high resistivity Si interposers with polymer TSV liners for 3D RF module

Kwang Seong Choi; Haksun Lee; Hyun Cheol Bae; Yong Sung Eom; Kangwook Lee; Takafumi Fukushima; Mitsumasa Koyanagi; Jin Ho Lee

doi:10.1109/ECTC.2015.7159705

Characterization of 3D stacked high resistivity Si interposers with polymer TSV liners for 3D RF module

Kwang Seong Choi, Haksun Lee, Hyun Cheol Bae, Yong Sung Eom, Kangwook Lee, Takafumi Fukushima, Mitsumasa Koyanagi, Jin Ho Lee

New Industry Creation Hatchery Center (NICHe)

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

4 Citations (Scopus)

Abstract

The material designs of the Si interposers are optimized for a 3D RF module. The high resistivity Si wafers are used for the Si interposer fabrication: 1,000 ω·cm ∼ 10,000 ω·cm. To reduce the capacitance and mechanical stress between Cufilled TSV and Si substrate, a polyimide insulation layer is applied as a TSV liner. We designs several types of the transmission line structures and measures their electrical properties. For the 3D interconnection between the Si interposers, fluxing underfill material is developed and used as a pre-applied underfill for the thermocompression bonding process. With these optimizations of materials design of the Si interposers, the microstrip line shows the electrical loss of 0.065 dB/mm at 10 GHz, and the insertion loss of the vertical transition is 0.4 dB at 10 GHz.

Original language	English
Title of host publication	2015 IEEE 65th Electronic Components and Technology Conference, ECTC 2015
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	928-933
Number of pages	6
ISBN (Electronic)	9781479986095
DOIs	https://doi.org/10.1109/ECTC.2015.7159705
Publication status	Published - 2015 Jul 15
Event	2015 65th IEEE Electronic Components and Technology Conference, ECTC 2015 - San Diego, United States Duration: 2015 May 26 → 2015 May 29

Publication series

Name	Proceedings - Electronic Components and Technology Conference
Volume	2015-July
ISSN (Print)	0569-5503

Other

Other	2015 65th IEEE Electronic Components and Technology Conference, ECTC 2015
Country/Territory	United States
City	San Diego
Period	15/5/26 → 15/5/29

ASJC Scopus subject areas

Electronic, Optical and Magnetic Materials
Electrical and Electronic Engineering

Access to Document

10.1109/ECTC.2015.7159705

Cite this

Choi, K. S., Lee, H., Bae, H. C., Eom, Y. S., Lee, K., Fukushima, T., Koyanagi, M., & Lee, J. H. (2015). Characterization of 3D stacked high resistivity Si interposers with polymer TSV liners for 3D RF module. In 2015 IEEE 65th Electronic Components and Technology Conference, ECTC 2015 (pp. 928-933). [7159705] (Proceedings - Electronic Components and Technology Conference; Vol. 2015-July). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ECTC.2015.7159705

Characterization of 3D stacked high resistivity Si interposers with polymer TSV liners for 3D RF module. / Choi, Kwang Seong; Lee, Haksun; Bae, Hyun Cheol et al.

2015 IEEE 65th Electronic Components and Technology Conference, ECTC 2015. Institute of Electrical and Electronics Engineers Inc., 2015. p. 928-933 7159705 (Proceedings - Electronic Components and Technology Conference; Vol. 2015-July).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Choi, KS, Lee, H, Bae, HC, Eom, YS, Lee, K, Fukushima, T, Koyanagi, M & Lee, JH 2015, Characterization of 3D stacked high resistivity Si interposers with polymer TSV liners for 3D RF module. in 2015 IEEE 65th Electronic Components and Technology Conference, ECTC 2015., 7159705, Proceedings - Electronic Components and Technology Conference, vol. 2015-July, Institute of Electrical and Electronics Engineers Inc., pp. 928-933, 2015 65th IEEE Electronic Components and Technology Conference, ECTC 2015, San Diego, United States, 15/5/26. https://doi.org/10.1109/ECTC.2015.7159705

Choi KS, Lee H, Bae HC, Eom YS, Lee K, Fukushima T et al. Characterization of 3D stacked high resistivity Si interposers with polymer TSV liners for 3D RF module. In 2015 IEEE 65th Electronic Components and Technology Conference, ECTC 2015. Institute of Electrical and Electronics Engineers Inc. 2015. p. 928-933. 7159705. (Proceedings - Electronic Components and Technology Conference). doi: 10.1109/ECTC.2015.7159705

Choi, Kwang Seong ; Lee, Haksun ; Bae, Hyun Cheol et al. / Characterization of 3D stacked high resistivity Si interposers with polymer TSV liners for 3D RF module. 2015 IEEE 65th Electronic Components and Technology Conference, ECTC 2015. Institute of Electrical and Electronics Engineers Inc., 2015. pp. 928-933 (Proceedings - Electronic Components and Technology Conference).

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abstract = "The material designs of the Si interposers are optimized for a 3D RF module. The high resistivity Si wafers are used for the Si interposer fabrication: 1,000 ω·cm ∼ 10,000 ω·cm. To reduce the capacitance and mechanical stress between Cufilled TSV and Si substrate, a polyimide insulation layer is applied as a TSV liner. We designs several types of the transmission line structures and measures their electrical properties. For the 3D interconnection between the Si interposers, fluxing underfill material is developed and used as a pre-applied underfill for the thermocompression bonding process. With these optimizations of materials design of the Si interposers, the microstrip line shows the electrical loss of 0.065 dB/mm at 10 GHz, and the insertion loss of the vertical transition is 0.4 dB at 10 GHz.",

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AU - Lee, Kangwook

AU - Fukushima, Takafumi

AU - Koyanagi, Mitsumasa

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N2 - The material designs of the Si interposers are optimized for a 3D RF module. The high resistivity Si wafers are used for the Si interposer fabrication: 1,000 ω·cm ∼ 10,000 ω·cm. To reduce the capacitance and mechanical stress between Cufilled TSV and Si substrate, a polyimide insulation layer is applied as a TSV liner. We designs several types of the transmission line structures and measures their electrical properties. For the 3D interconnection between the Si interposers, fluxing underfill material is developed and used as a pre-applied underfill for the thermocompression bonding process. With these optimizations of materials design of the Si interposers, the microstrip line shows the electrical loss of 0.065 dB/mm at 10 GHz, and the insertion loss of the vertical transition is 0.4 dB at 10 GHz.

AB - The material designs of the Si interposers are optimized for a 3D RF module. The high resistivity Si wafers are used for the Si interposer fabrication: 1,000 ω·cm ∼ 10,000 ω·cm. To reduce the capacitance and mechanical stress between Cufilled TSV and Si substrate, a polyimide insulation layer is applied as a TSV liner. We designs several types of the transmission line structures and measures their electrical properties. For the 3D interconnection between the Si interposers, fluxing underfill material is developed and used as a pre-applied underfill for the thermocompression bonding process. With these optimizations of materials design of the Si interposers, the microstrip line shows the electrical loss of 0.065 dB/mm at 10 GHz, and the insertion loss of the vertical transition is 0.4 dB at 10 GHz.

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Characterization of 3D stacked high resistivity Si interposers with polymer TSV liners for 3D RF module

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