Characterization and reliability of 3D LSI and SiP

K. W. Lee, M. Murugesan, Jichel Bea, T. Fukushima, T. Tanaka, M. Koyanagi

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

Reliability challenges in 3D LSI associated with mechanical constraints induced by Cu TSVs, μ-bumps and crystal defects, crystallinity in thinned Si wafer and metal contamination induced by Cu diffusion from TSVs and thinned backside surface are mainly discussed. Mechanical stresses induced by Cu TSVs and μ-bumps are strongly dependent on design rules and process parameters. DRAM retention characteristics were severely degraded by Si thinning, especially below 30 μm thickness. Minority carrier lifetime was seriously degraded by Cu diffusion from Cu TSVs as the blocking property of barrier layer in TSV is not sufficient. A dry polish (DP) treatment produced a superior extrinsic gettering (EG) layer to Cu diffusion at the backside. We suggest the nondestructive failure analysis using X-ray CT-scan to characterize TSVs connection and μ-bumps joining in 3D stacked LSIs.

Original languageEnglish
Title of host publication2013 IEEE International Electron Devices Meeting, IEDM 2013
Pages7.2.1-7.2.4
DOIs
Publication statusPublished - 2013 Dec 1
Event2013 IEEE International Electron Devices Meeting, IEDM 2013 - Washington, DC, United States
Duration: 2013 Dec 92013 Dec 11

Publication series

NameTechnical Digest - International Electron Devices Meeting, IEDM
ISSN (Print)0163-1918

Other

Other2013 IEEE International Electron Devices Meeting, IEDM 2013
CountryUnited States
CityWashington, DC
Period13/12/913/12/11

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Condensed Matter Physics
  • Electrical and Electronic Engineering
  • Materials Chemistry

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