TY - JOUR
T1 - Characteristics of poly-si thin film transistors with highly biaxially oriented linearly arranged poly-si thin films using double line beam continuous-wave laser lateral crystallization
AU - Yamano, M.
AU - Kuroki, S. I.
AU - Hirata, T.
AU - Sato, T.
AU - Kotani, K.
AU - Kikkawa, T.
N1 - Publisher Copyright:
© The Electrochemical Society.
PY - 2014
Y1 - 2014
N2 - Highly biaxially oriented linearly arranged poly-Si thin films were formed by double-line beam continuous-wave laser lateral crystallization (DLB-CLC). Crystallinities of the poly-Si thin films were (110), (111), and (211) for the laser scan, transverse, and surface directions, respectively, and an energetically stable σ3 grain boundary was dominantly observed. Silicon grains were elongated along the laser scan direction and one-dimensionally very large silicon grains with lengths of more than 100 μm were formed. High-performance low-temperature poly-Si thin film transistors (TFTs) using these poly-Si thin films were fabricated at low-temperatures (≤550°C) by a metal gate self-aligned process and a TFT with a high electron field effect mobility of μFE= 560 cm2V-1s-1 in a linear region was realized. Also, electron field effect mobility variation of below 10% was obtained at the same crystallization region. Leakage current mechanism was also investigated by temperature dependence of the TFT characteristics.
AB - Highly biaxially oriented linearly arranged poly-Si thin films were formed by double-line beam continuous-wave laser lateral crystallization (DLB-CLC). Crystallinities of the poly-Si thin films were (110), (111), and (211) for the laser scan, transverse, and surface directions, respectively, and an energetically stable σ3 grain boundary was dominantly observed. Silicon grains were elongated along the laser scan direction and one-dimensionally very large silicon grains with lengths of more than 100 μm were formed. High-performance low-temperature poly-Si thin film transistors (TFTs) using these poly-Si thin films were fabricated at low-temperatures (≤550°C) by a metal gate self-aligned process and a TFT with a high electron field effect mobility of μFE= 560 cm2V-1s-1 in a linear region was realized. Also, electron field effect mobility variation of below 10% was obtained at the same crystallization region. Leakage current mechanism was also investigated by temperature dependence of the TFT characteristics.
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U2 - 10.1149/06410.0039ecst
DO - 10.1149/06410.0039ecst
M3 - Conference article
AN - SCOPUS:84921272289
VL - 64
SP - 39
EP - 44
JO - ECS Transactions
JF - ECS Transactions
SN - 1938-5862
IS - 10
T2 - 12th Symposium on Thin Film Transistor Technologies, TFT 2014 - 2014 ECS and SMEQ Joint International Meeting
Y2 - 5 October 2014 through 9 October 2014
ER -