Characteristics of 0.25 μm ferroelectric nonvolatile memory with a Pb(Zr, Ti)O3 capacitor on a metal/via-stacked plug

Kazushi Amanuma; Sota Kobayashi; Toru Tatsumi; Yukihiko Maejima; Hiromitsu Hada; Junichi Yamada; Tohru Miwa; Hiroki Koike; Hideo Toyoshima; Takemitsu Kunio

doi:10.1143/jjap.39.2098

Characteristics of 0.25 μm ferroelectric nonvolatile memory with a Pb(Zr, Ti)O₃ capacitor on a metal/via-stacked plug

Kazushi Amanuma, Sota Kobayashi, Toru Tatsumi, Yukihiko Maejima, Hiromitsu Hada, Junichi Yamada, Tohru Miwa, Hiroki Koike, Hideo Toyoshima, Takemitsu Kunio

Research output: Contribution to journal › Article › peer-review

14 Citations (Scopus)

Abstract

A 0.25-μm ferroelectric memory with 16 kbit-cell array was fabricated. A Pb(Zr, Ti)O₃ (PZT) capacitor was formed on a metal(Al)/via(W)-stacked plug using low temperature metal organic chemical vapor deposition (MO-CVD). The backend process had no effect on the PZT capacitor properties. The 1 × 1 μm² capacitor shows good fatigue and imprint endurance. Signal voltage on the bit-line in the cell array is 1.06 V for switching and 0.58 V for unswitching. These results agree well with the pulse-response measurement of the parallel capacitor. However, the signal voltage deviation becomes larger with the capacitor size reduction. The 16 kbit-cell array shows the column access time of 50 ns and the minimum operation voltage of 1.6 V.

Original language	English
Pages (from-to)	2098-2101
Number of pages	4
Journal	Japanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers
Volume	39
Issue number	4 B
DOIs	https://doi.org/10.1143/jjap.39.2098
Publication status	Published - 2000
Externally published	Yes

Keywords

Bit-line voltage
Fatigue
Ferroelectric
Hysteresis
Imprint
Nonvolatile memory
PZT
Polarization
Pulse response

ASJC Scopus subject areas

Engineering(all)
Physics and Astronomy(all)

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Amanuma, K., Kobayashi, S., Tatsumi, T., Maejima, Y., Hada, H., Yamada, J., Miwa, T., Koike, H., Toyoshima, H., & Kunio, T. (2000). Characteristics of 0.25 μm ferroelectric nonvolatile memory with a Pb(Zr, Ti)O₃ capacitor on a metal/via-stacked plug. Japanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers, 39(4 B), 2098-2101. https://doi.org/10.1143/jjap.39.2098

Characteristics of 0.25 μm ferroelectric nonvolatile memory with a Pb(Zr, Ti)O₃ capacitor on a metal/via-stacked plug. / Amanuma, Kazushi; Kobayashi, Sota; Tatsumi, Toru; Maejima, Yukihiko; Hada, Hiromitsu; Yamada, Junichi; Miwa, Tohru; Koike, Hiroki; Toyoshima, Hideo; Kunio, Takemitsu.

In: Japanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers, Vol. 39, No. 4 B, 2000, p. 2098-2101.

Research output: Contribution to journal › Article › peer-review

Amanuma, K, Kobayashi, S, Tatsumi, T, Maejima, Y, Hada, H, Yamada, J, Miwa, T, Koike, H, Toyoshima, H & Kunio, T 2000, 'Characteristics of 0.25 μm ferroelectric nonvolatile memory with a Pb(Zr, Ti)O₃ capacitor on a metal/via-stacked plug', Japanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers, vol. 39, no. 4 B, pp. 2098-2101. https://doi.org/10.1143/jjap.39.2098

Amanuma, Kazushi ; Kobayashi, Sota ; Tatsumi, Toru ; Maejima, Yukihiko ; Hada, Hiromitsu ; Yamada, Junichi ; Miwa, Tohru ; Koike, Hiroki ; Toyoshima, Hideo ; Kunio, Takemitsu. / Characteristics of 0.25 μm ferroelectric nonvolatile memory with a Pb(Zr, Ti)O₃ capacitor on a metal/via-stacked plug. In: Japanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers. 2000 ; Vol. 39, No. 4 B. pp. 2098-2101.

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abstract = "A 0.25-μm ferroelectric memory with 16 kbit-cell array was fabricated. A Pb(Zr, Ti)O3 (PZT) capacitor was formed on a metal(Al)/via(W)-stacked plug using low temperature metal organic chemical vapor deposition (MO-CVD). The backend process had no effect on the PZT capacitor properties. The 1 × 1 μm2 capacitor shows good fatigue and imprint endurance. Signal voltage on the bit-line in the cell array is 1.06 V for switching and 0.58 V for unswitching. These results agree well with the pulse-response measurement of the parallel capacitor. However, the signal voltage deviation becomes larger with the capacitor size reduction. The 16 kbit-cell array shows the column access time of 50 ns and the minimum operation voltage of 1.6 V.",

keywords = "Bit-line voltage, Fatigue, Ferroelectric, Hysteresis, Imprint, Nonvolatile memory, PZT, Polarization, Pulse response",

author = "Kazushi Amanuma and Sota Kobayashi and Toru Tatsumi and Yukihiko Maejima and Hiromitsu Hada and Junichi Yamada and Tohru Miwa and Hiroki Koike and Hideo Toyoshima and Takemitsu Kunio",

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AU - Amanuma, Kazushi

AU - Kobayashi, Sota

AU - Tatsumi, Toru

AU - Maejima, Yukihiko

AU - Hada, Hiromitsu

AU - Yamada, Junichi

AU - Miwa, Tohru

AU - Koike, Hiroki

AU - Toyoshima, Hideo

AU - Kunio, Takemitsu

PY - 2000

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N2 - A 0.25-μm ferroelectric memory with 16 kbit-cell array was fabricated. A Pb(Zr, Ti)O3 (PZT) capacitor was formed on a metal(Al)/via(W)-stacked plug using low temperature metal organic chemical vapor deposition (MO-CVD). The backend process had no effect on the PZT capacitor properties. The 1 × 1 μm2 capacitor shows good fatigue and imprint endurance. Signal voltage on the bit-line in the cell array is 1.06 V for switching and 0.58 V for unswitching. These results agree well with the pulse-response measurement of the parallel capacitor. However, the signal voltage deviation becomes larger with the capacitor size reduction. The 16 kbit-cell array shows the column access time of 50 ns and the minimum operation voltage of 1.6 V.

AB - A 0.25-μm ferroelectric memory with 16 kbit-cell array was fabricated. A Pb(Zr, Ti)O3 (PZT) capacitor was formed on a metal(Al)/via(W)-stacked plug using low temperature metal organic chemical vapor deposition (MO-CVD). The backend process had no effect on the PZT capacitor properties. The 1 × 1 μm2 capacitor shows good fatigue and imprint endurance. Signal voltage on the bit-line in the cell array is 1.06 V for switching and 0.58 V for unswitching. These results agree well with the pulse-response measurement of the parallel capacitor. However, the signal voltage deviation becomes larger with the capacitor size reduction. The 16 kbit-cell array shows the column access time of 50 ns and the minimum operation voltage of 1.6 V.

KW - Bit-line voltage

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KW - Ferroelectric

KW - Hysteresis

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KW - Nonvolatile memory

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KW - Polarization

KW - Pulse response

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