Characteristics of 0.25 μm ferroelectric nonvolatile memory with a Pb(Zr, Ti)O3 capacitor on a metal/via-stacked plug

Kazushi Amanuma, Sota Kobayashi, Toru Tatsumi, Yukihiko Maejima, Hiromitsu Hada, Junichi Yamada, Tohru Miwa, Hiroki Koike, Hideo Toyoshima, Takemitsu Kunio

Research output: Contribution to journalArticlepeer-review

14 Citations (Scopus)


A 0.25-μm ferroelectric memory with 16 kbit-cell array was fabricated. A Pb(Zr, Ti)O3 (PZT) capacitor was formed on a metal(Al)/via(W)-stacked plug using low temperature metal organic chemical vapor deposition (MO-CVD). The backend process had no effect on the PZT capacitor properties. The 1 × 1 μm2 capacitor shows good fatigue and imprint endurance. Signal voltage on the bit-line in the cell array is 1.06 V for switching and 0.58 V for unswitching. These results agree well with the pulse-response measurement of the parallel capacitor. However, the signal voltage deviation becomes larger with the capacitor size reduction. The 16 kbit-cell array shows the column access time of 50 ns and the minimum operation voltage of 1.6 V.

Original languageEnglish
Pages (from-to)2098-2101
Number of pages4
JournalJapanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers
Issue number4 B
Publication statusPublished - 2000
Externally publishedYes


  • Bit-line voltage
  • Fatigue
  • Ferroelectric
  • Hysteresis
  • Imprint
  • Nonvolatile memory
  • PZT
  • Polarization
  • Pulse response

ASJC Scopus subject areas

  • Engineering(all)
  • Physics and Astronomy(all)

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