Challenge of nonvolatile logic LSI Using MTJ-based logic-in-memory architecture

Research output: Chapter in Book/Report/Conference proceedingChapter

1 Citation (Scopus)

Abstract

In this chapter, a new architecture, called “nonvolatile logic-in-memory (NV-LIM) architecture,” is presented, where the NV-LIM architecture could overcome performance wall and power wall due to the present CMOS-only-based logic-LSI processors [1–3]. Figure 1a shows a conventional logic-LSI architecture, where logic and memory modules are separately implemented together and these modules are connected each other through global interconnections. Even if the device feature size is scaled down in accordance with the semiconductor technology roadmap, the global interconnections are not shorten, rather than are getting longer, which resulting in longer delay and higher power dissipation due to inside wires. In addition, since on-chip memory modules are “volatile”, they always consume the static power to maintain the stored data.

Original languageEnglish
Title of host publicationSpintronics-based Computing
PublisherSpringer International Publishing
Pages159-178
Number of pages20
ISBN (Electronic)9783319151809
ISBN (Print)9783319151793
DOIs
Publication statusPublished - 2015 Jan 1

ASJC Scopus subject areas

  • Engineering(all)
  • Computer Science(all)

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