Challenge of MTJ-based nonvolatile logic-in-memory architecture for dark-silicon logic lsi

Takahiro Hanyu

doi:10.1142/S2010324713400146

Challenge of MTJ-based nonvolatile logic-in-memory architecture for dark-silicon logic lsi

Takahiro Hanyu

Systems & Software Division

Research output: Contribution to journal › Article › peer-review

4 Citations (Scopus)

Abstract

This paper presents an architecture-level approach, called nonvolatile logic-in-memory (NV-LIM) architecture, to solving performance-wall and power-wall problems in the present CMOS-only-based logic-LSI (Large-Scaled Integration) processors. The use of magnetic tunnel junction devices combined with a CMOS-gate style makes it possible to achieve a high-performance and ultra-low-power logic LSI. Some concrete examples using the proposed method allow you to achieve the desired performance improvement compared to a corresponding CMOS-only-based realization.

Original language	English
Article number	1340014
Journal	SPIN
Volume	3
Issue number	4
DOIs	https://doi.org/10.1142/S2010324713400146
Publication status	Published - 2013 Dec 1

Keywords

logic LSI
Logic-in-memory architecture
magnetic tunnel junction
magneto-resistive random access memory (MRAM)

ASJC Scopus subject areas

Electronic, Optical and Magnetic Materials
Atomic and Molecular Physics, and Optics
Electrical and Electronic Engineering

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