Abstract
This paper presents an architecture-level approach, called nonvolatile logic-in-memory (NV-LIM) architecture, to solving performance-wall and power-wall problems in the present CMOS-only-based logic-LSI (Large-Scaled Integration) processors. The use of magnetic tunnel junction devices combined with a CMOS-gate style makes it possible to achieve a high-performance and ultra-low-power logic LSI. Some concrete examples using the proposed method allow you to achieve the desired performance improvement compared to a corresponding CMOS-only-based realization.
Original language | English |
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Article number | 1340014 |
Journal | SPIN |
Volume | 3 |
Issue number | 4 |
DOIs | |
Publication status | Published - 2013 Dec 1 |
Keywords
- logic LSI
- Logic-in-memory architecture
- magnetic tunnel junction
- magneto-resistive random access memory (MRAM)
ASJC Scopus subject areas
- Electronic, Optical and Magnetic Materials
- Atomic and Molecular Physics, and Optics
- Electrical and Electronic Engineering