Challenge of MTJ-based nonvolatile logic-in-memory architecture for ultra low-power and highly dependable VLSI computing

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

Novel logic-LSI architecture, 'nonvolatile logic-in-memory (NV-LIM) architecture,' where nonvolatile storage elements are distributed over a logic-circuit plane, is proposed as a promising candidate to overcome performance wall and power wall due to the present CMOS-only-based logic LSIs. Some concrete design examples based on the NV-LIM architecture are demonstrated and their usefulness is discussed in comparison with the corresponding CMOS-only-based realization.

Original languageEnglish
Title of host publication2015 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2015
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781509002597
DOIs
Publication statusPublished - 2015 Nov 20
EventIEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2015 - Rohnert Park, United States
Duration: 2015 Oct 52015 Oct 8

Publication series

Name2015 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2015

Other

OtherIEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2015
CountryUnited States
CityRohnert Park
Period15/10/515/10/8

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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