Carrier redistribution analysis of gate-biased SiC power-MOSFET using super-higher-order scanning nonlinear dielectric microscopy

Norimichi Chinone, Yasuo Cho

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Gate-bias dependent depletion layer distribution and carrier distributions in cross-section of SiC power MOSFET were measured by newly developed measurement system based on super-higher-order scanning nonlinear dielectric microscope. The results visualized gate-source voltage dependent redistribution of depletion layer and carrier.

Original languageEnglish
Title of host publicationISTFA 2015 - Conference Proceedings from the 41st International Symposium for Testing and Failure Analysis
PublisherASM International
Pages329-332
Number of pages4
ISBN (Electronic)162708102X, 9781627081023
Publication statusPublished - 2015 Jan 1
Event41st International Symposium for Testing and Failure Analysis, ISTFA 2015 - Portland, United States
Duration: 2015 Nov 12015 Nov 5

Publication series

NameConference Proceedings from the International Symposium for Testing and Failure Analysis
Volume2015-January

Other

Other41st International Symposium for Testing and Failure Analysis, ISTFA 2015
CountryUnited States
CityPortland
Period15/11/115/11/5

ASJC Scopus subject areas

  • Control and Systems Engineering
  • Safety, Risk, Reliability and Quality
  • Electrical and Electronic Engineering

Fingerprint Dive into the research topics of 'Carrier redistribution analysis of gate-biased SiC power-MOSFET using super-higher-order scanning nonlinear dielectric microscopy'. Together they form a unique fingerprint.

Cite this