Abstract
We proposed Bit Cost Scalable (BiCS) technology in 2007 as a three-dimensional memory for the future ultra high density storage devices, which extremely reduce the bit costs by vertically stacking memory arrays with punch and plug process. We've applied it to just NAND flash, which is BiCS Flash memory, and established the mass production technology. Moreover, we can apply the BiCS technology to various memories. The critical scaling issues and the comparison among various 3D-Flash-type memories are to be discussed, as well.
| Original language | English |
|---|---|
| Title of host publication | 2013 Symposium on VLSI Technology, VLSIT 2013 - Digest of Technical Papers |
| Publication status | Published - 2013 Sep 9 |
| Event | 2013 Symposium on VLSI Technology, VLSIT 2013 - Kyoto, Japan Duration: 2013 Jun 11 → 2013 Jun 13 |
Other
| Other | 2013 Symposium on VLSI Technology, VLSIT 2013 |
|---|---|
| Country/Territory | Japan |
| City | Kyoto |
| Period | 13/6/11 → 13/6/13 |
ASJC Scopus subject areas
- Electrical and Electronic Engineering