@inproceedings{380942f8083b4bf88f5ee2ceb2938b65,
title = "Bit Cost Scalable (BiCS) flash technology for future ultra high density storage devices",
abstract = "We have proposed Bit-Cost Scalable (BiCS) technology which realizes a 3D multi-stacked memory array with a few critical lithography steps regardless of the number of stacked layers to keep a drastically continuous reduction of bit cost. The cell array concept, fabrication process, and key features are presented.",
author = "Akihiro Nitayama and Hideaki Aochi",
year = "2009",
month = dec,
day = "1",
doi = "10.1149/1.3096433",
language = "English",
isbn = "9781615676460",
series = "ECS Transactions",
number = "1 PART 1",
pages = "89--92",
booktitle = "ECS Transactions - ISTC/CSTIC 2009 (CISTC)",
edition = "1 PART 1",
note = "ISTC/CSTIC 2009 (CISTC) ; Conference date: 19-03-2009 Through 20-03-2009",
}