Abstract
For highly parallel operation, use of a radix‐4 signed‐digit (SD) number system is attractive. Since the SD number system uses more than three values in each digit, multivalued coding is suitable for the implementation of the high‐speed compact arithmetic integrated circuits. We have already proposed the basic idea of multivalued bidirectional current‐mode circuits which are essentially suitable for the SD arithmetic implementation. This paper describes the experimental results of the basic SD arithmetic integrated circuits by means of the bidirectional current‐mode circuits and their evaluation. A parallel SD adder is implemented with 2‐μm CMOS technology and the addition time is estimated to be about 10 ns. The addition time of the SD adder is 14 times faster than that of the conventional ripple‐carry adder and is three times faster than that of the block carry lookahead adder.
Original language | English |
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Pages (from-to) | 69-79 |
Number of pages | 11 |
Journal | Systems and Computers in Japan |
Volume | 20 |
Issue number | 6 |
DOIs | |
Publication status | Published - 1989 |
ASJC Scopus subject areas
- Theoretical Computer Science
- Information Systems
- Hardware and Architecture
- Computational Theory and Mathematics