Abstract
This paper presents a system for the automatic generation of Galois-field (GF) arithmetic circuits, named the GF Arithmetic Module Generator (GF-AMG). The proposed system employs a graph-based circuit description called the GF Arithmetic Circuit Graph (GF-ACG). First, we present an extension of the GF-ACG to handle GF(pm) (p ≥ 3) arithmetic circuits, which can be efficiently implemented by multiple-valued logic circuits in addition to the conventional binary circuits. We then show the validity of the generation system through the experimental design of GF(GF(pm)) multipliers for different p-values. In addition, we evaluate the performance of three types of GF(2m) multipliers and typical GF(GF(pm)) multipliers (p ≥3) empirically generated by our system. We confirm from the results that the proposed system can generate a variety of GF parallel multipliers, including practical multipliers over GF(GF(pm)) having extension degrees greater than 128.
Original language | English |
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Pages (from-to) | 1603-1610 |
Number of pages | 8 |
Journal | IEICE Transactions on Information and Systems |
Volume | E100D |
Issue number | 8 |
DOIs | |
Publication status | Published - 2017 Aug |
Keywords
- Automatic generation
- Formal design
- GF arithmetic circuits
- Multiple-valued logic
- Parallel multipliers
ASJC Scopus subject areas
- Software
- Hardware and Architecture
- Computer Vision and Pattern Recognition
- Electrical and Electronic Engineering
- Artificial Intelligence