TY - GEN
T1 - Atomic Layer Defect-free Top-down Process for Future Nano-devices
AU - Samukawa, Seiji
PY - 2018/12/5
Y1 - 2018/12/5
N2 - Advances in plasma process technology have contributed directly to advances in the miniaturization and integration of semiconductor devices. However, in semiconductor devices that encroach on the nanoscale domain, defects or damage can be caused by charged particles and ultraviolet rays emitted from the plasma, severely impairing the characteristics of nano-devices that have a larger surface than bulk areas. It is therefore essential to develop a method for suppressing or controlling charge accumulation and ultraviolet damage in plasma processing. The neutral beam process developed by the authors is a method that suppresses the formation of defects at the atomic layer level in the processed surface, allowing ideal surface chemical reactions to take place at room temperature. This technique is indispensable to develop future innovative nano-devices.
AB - Advances in plasma process technology have contributed directly to advances in the miniaturization and integration of semiconductor devices. However, in semiconductor devices that encroach on the nanoscale domain, defects or damage can be caused by charged particles and ultraviolet rays emitted from the plasma, severely impairing the characteristics of nano-devices that have a larger surface than bulk areas. It is therefore essential to develop a method for suppressing or controlling charge accumulation and ultraviolet damage in plasma processing. The neutral beam process developed by the authors is a method that suppresses the formation of defects at the atomic layer level in the processed surface, allowing ideal surface chemical reactions to take place at room temperature. This technique is indispensable to develop future innovative nano-devices.
UR - http://www.scopus.com/inward/record.url?scp=85060271314&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=85060271314&partnerID=8YFLogxK
U2 - 10.1109/ICSICT.2018.8565773
DO - 10.1109/ICSICT.2018.8565773
M3 - Conference contribution
AN - SCOPUS:85060271314
T3 - 2018 14th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2018 - Proceedings
BT - 2018 14th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2018 - Proceedings
A2 - Tang, Ting-Ao
A2 - Ye, Fan
A2 - Jiang, Yu-Long
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 14th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2018
Y2 - 31 October 2018 through 3 November 2018
ER -