Asynchronous pulse neural network model and its analog IC implementation

Yoshihiko Horio; Hidekazu Yasuda; Mitsuru Hanagata; Kazuyuki Aihara

Asynchronous pulse neural network model and its analog IC implementation

Yoshihiko Horio, Hidekazu Yasuda, Mitsuru Hanagata, Kazuyuki Aihara

Research output: Contribution to conference › Paper › peer-review

Abstract

Prototype neuron and axon circuits for the asynchronous pulse neural network model are fabricated with 1.2 μm CMOS technology and tested. The neuron circuit can function as both of a coincidence detector and an integrator. These opposite neuronal functions can be controlled by changing the internal time constants through the external voltages. The axon circuit, which mimics axonal, dendritic and synaptic delays, realizes pulse delay. The delay time can be continuously controlled by the external voltage.

Original language	English
Pages	301-304
Number of pages	4
Publication status	Published - 1998 Dec 1
Externally published	Yes
Event	Proceedings of the 1998 5th IEEE International Conference on Electronics, Circuits and Systems (ICECS'98) - Surfing the Waves of Science and Technology - Lisboa, Portugal Duration: 1998 Sep 7 → 1998 Sep 10

Other

Other	Proceedings of the 1998 5th IEEE International Conference on Electronics, Circuits and Systems (ICECS'98) - Surfing the Waves of Science and Technology
City	Lisboa, Portugal
Period	98/9/7 → 98/9/10

ASJC Scopus subject areas

Engineering(all)
Electrical and Electronic Engineering

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Asynchronous pulse neural network model and its analog IC implementation. / Horio, Yoshihiko; Yasuda, Hidekazu; Hanagata, Mitsuru; Aihara, Kazuyuki.

1998. 301-304 Paper presented at Proceedings of the 1998 5th IEEE International Conference on Electronics, Circuits and Systems (ICECS'98) - Surfing the Waves of Science and Technology, Lisboa, Portugal, .

Research output: Contribution to conference › Paper › peer-review

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