Architecture of a low-power FPGA based on self-adaptive voltage control

Shota Ishihara, Zhengfan Xia, Masanori Hariyama, Michitaka Kameyama

Research output: Chapter in Book/Report/Conference proceedingConference contribution

6 Citations (Scopus)

Abstract

This paper presents a low-power FPGA with multiple supply voltages. In the proposed FPGA, the supply voltage of each logic block is self-adaptive to the workload, data path and temperature to minimize the power consumption without system performance degradation. In the self-adaptive voltage control scheme, features of the asynchronous architecture are exploited. The data arrival of the asynchronous architecture can be easily detected by detecting the change of the data's phase. By exploiting this feature, the critical path can be detected in real time. Logic blocks on the non-critical path are autonomously switched to a lower supply voltage to reduce the power consumption.

Original languageEnglish
Title of host publication2009 International SoC Design Conference, ISOCC 2009
Pages274-277
Number of pages4
DOIs
Publication statusPublished - 2009 Dec 1
Event2009 International SoC Design Conference, ISOCC 2009 - Busan, Korea, Republic of
Duration: 2009 Nov 222009 Nov 24

Publication series

Name2009 International SoC Design Conference, ISOCC 2009

Other

Other2009 International SoC Design Conference, ISOCC 2009
CountryKorea, Republic of
CityBusan
Period09/11/2209/11/24

Keywords

  • Asynchronous architecture
  • Dynamic voltage and frequency scaling
  • Multiple voltages
  • Reconfigurable VLSI

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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