An on-chip 96.5% current efficiency CMOS linear regulator

K. Sunaga, T. Endoh, H. Sakuraba, F. Masuoka

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

A proposed linear regulator uses a flexible control technique of output current (FCOC) to achieve 96.5% efficiency. The FCOC technique drives a flexible output current according to the output current variation and stable output voltage supply. The linear regulator fabricated by 1.2 μm CMOS process occupies 0.423 mm2. The fabricated linear regulator achieves 96.5% current efficiency and less than 6.81 mVpp output voltage fluctuation at an output current frequency from 1.8 Hz to 100 MHz.

Original languageEnglish
Title of host publicationProceedings of the ASP-DAC 2001
Subtitle of host publicationAsia and South Pacific Design Automation Conference 2001
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages297-301
Number of pages5
ISBN (Electronic)0780366336
DOIs
Publication statusPublished - 2001 Jan 1
EventAsia and South Pacific Design Automation Conference 2001, ASP-DAC 2001 - Yokohama, Japan
Duration: 2001 Jan 302001 Feb 2

Publication series

NameProceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC
Volume2001-January

Other

OtherAsia and South Pacific Design Automation Conference 2001, ASP-DAC 2001
CountryJapan
CityYokohama
Period01/1/3001/2/2

Keywords

  • CMOS technology
  • Circuit simulation
  • Communication system control
  • Driver circuits
  • Mirrors
  • Pulse width modulation
  • Pulse width modulation converters
  • Regulators
  • SPICE
  • Voltage

ASJC Scopus subject areas

  • Computer Science Applications
  • Computer Graphics and Computer-Aided Design
  • Electrical and Electronic Engineering

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