An integrated multi-scroll circuit with floating-gate mosfets

Tetsuya Fujiwara, Yoshihiko Horio, Kazuyuki Aihara

Research output: Contribution to journalConference article

9 Citations (Scopus)

Abstract

This paper proposes a multi-scroll circuit that is fast, compact, versatile, and suitable for CMOS implementation. The circuit uses a high-Q CMOS active inductor circuit as a simulated inductor. We use parallel combinations of N-type conductance circuits with floating-gate MOSFETs to create high-order piecewise-linear negative conductances. We integrate the proposed circuit with MOSIS TSMC 0.35 μm CMOS process. HSPICE simulation results and experimental results from the prototype chip are shown.

Original languageEnglish
JournalProceedings - IEEE International Symposium on Circuits and Systems
Volume3
Publication statusPublished - 2003 Jul 14
Externally publishedYes
EventProceedings of the 2003 IEEE International Symposium on Circuits and Systems - Bangkok, Thailand
Duration: 2003 May 252003 May 28

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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