An experimental study of TiN gate FinFET SRAM with (111)-oriented sidewall channels

Y. X. Liu, T. Hayashida, T. Matsukawa, K. Endo, S. O'uchi, K. Sakamoto, M. Masahara, K. Ishii, J. Tsukada, Y. Ishikawa, H. Yamauchi, A. Ogura, E. Suzuki

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Citations (Scopus)

Abstract

TiN gate FinFET SRAM half-cells with different β-ratios from 1-3 have successfully been fabricated by using the orientation dependent wet etching and conventional reactive sputtering, for the first time. It is experimentally found that static noise margin (SNM) at read condition increases with increasing β-ratio due to the strength of pull-down transistor. To overcome SRAM cell size increment with increasing β, a fin-height controlled pass-gate (PG) SRAM structure is proposed.

Original languageEnglish
Title of host publicationIEEE 2008 Silicon Nanoelectronics Workshop, SNW 2008
DOIs
Publication statusPublished - 2008 Dec 1
Externally publishedYes
EventIEEE 2008 Silicon Nanoelectronics Workshop, SNW 2008 - Honolulu, HI, United States
Duration: 2008 Jun 152008 Jun 16

Publication series

NameIEEE 2008 Silicon Nanoelectronics Workshop, SNW 2008

Other

OtherIEEE 2008 Silicon Nanoelectronics Workshop, SNW 2008
CountryUnited States
CityHonolulu, HI
Period08/6/1508/6/16

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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