An approach to synthesis of reversible circuits for partially specified functions

Marek Perkowski; Robert Fiszer; Pawel Kerntopf; Martin Lukac

doi:10.1109/NANO.2012.6322122

An approach to synthesis of reversible circuits for partially specified functions

Marek Perkowski, Robert Fiszer, Pawel Kerntopf, Martin Lukac

INF - Computer and Mathematical Sciences

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

4 Citations (Scopus)

Abstract

We provide several extensions of the new approach to the minimization of reversible circuits based on PSE gates and ESOPOS circuits. These circuits realize the Exclusive-Or-Sum-of-Product-Sums (ESOPOS) structure where every output is an exclusive-or of Product-Sum-Exor (PSE) gates which generalize the multi-input Toffoli gates. We also propose a new efficient realization of the PSE gate that uses external-binary, internal-ternary logic.

Original language	English
Title of host publication	2012 12th IEEE International Conference on Nanotechnology, NANO 2012
DOIs	https://doi.org/10.1109/NANO.2012.6322122
Publication status	Published - 2012 Nov 22
Event	2012 12th IEEE International Conference on Nanotechnology, NANO 2012 - Birmingham, United Kingdom Duration: 2012 Aug 20 → 2012 Aug 23

Other

Other	2012 12th IEEE International Conference on Nanotechnology, NANO 2012
Country/Territory	United Kingdom
City	Birmingham
Period	12/8/20 → 12/8/23

Keywords

Quantum computing
Reversible circuits

ASJC Scopus subject areas

Bioengineering
Electrical and Electronic Engineering
Materials Chemistry
Condensed Matter Physics

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10.1109/NANO.2012.6322122

Cite this

@inproceedings{a8e3a56b72e048c5b7072054a5f653d8,

title = "An approach to synthesis of reversible circuits for partially specified functions",

abstract = "We provide several extensions of the new approach to the minimization of reversible circuits based on PSE gates and ESOPOS circuits. These circuits realize the Exclusive-Or-Sum-of-Product-Sums (ESOPOS) structure where every output is an exclusive-or of Product-Sum-Exor (PSE) gates which generalize the multi-input Toffoli gates. We also propose a new efficient realization of the PSE gate that uses external-binary, internal-ternary logic.",

keywords = "Quantum computing, Reversible circuits",

author = "Marek Perkowski and Robert Fiszer and Pawel Kerntopf and Martin Lukac",

year = "2012",

month = nov,

day = "22",

doi = "10.1109/NANO.2012.6322122",

language = "English",

isbn = "9781467321983",

booktitle = "2012 12th IEEE International Conference on Nanotechnology, NANO 2012",

note = "2012 12th IEEE International Conference on Nanotechnology, NANO 2012 ; Conference date: 20-08-2012 Through 23-08-2012",

}

TY - GEN

T1 - An approach to synthesis of reversible circuits for partially specified functions

AU - Perkowski, Marek

AU - Fiszer, Robert

AU - Kerntopf, Pawel

AU - Lukac, Martin

PY - 2012/11/22

Y1 - 2012/11/22

N2 - We provide several extensions of the new approach to the minimization of reversible circuits based on PSE gates and ESOPOS circuits. These circuits realize the Exclusive-Or-Sum-of-Product-Sums (ESOPOS) structure where every output is an exclusive-or of Product-Sum-Exor (PSE) gates which generalize the multi-input Toffoli gates. We also propose a new efficient realization of the PSE gate that uses external-binary, internal-ternary logic.

AB - We provide several extensions of the new approach to the minimization of reversible circuits based on PSE gates and ESOPOS circuits. These circuits realize the Exclusive-Or-Sum-of-Product-Sums (ESOPOS) structure where every output is an exclusive-or of Product-Sum-Exor (PSE) gates which generalize the multi-input Toffoli gates. We also propose a new efficient realization of the PSE gate that uses external-binary, internal-ternary logic.

KW - Quantum computing

KW - Reversible circuits

UR - http://www.scopus.com/inward/record.url?scp=84869185595&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=84869185595&partnerID=8YFLogxK

U2 - 10.1109/NANO.2012.6322122

DO - 10.1109/NANO.2012.6322122

M3 - Conference contribution

AN - SCOPUS:84869185595

SN - 9781467321983

BT - 2012 12th IEEE International Conference on Nanotechnology, NANO 2012

T2 - 2012 12th IEEE International Conference on Nanotechnology, NANO 2012

Y2 - 20 August 2012 through 23 August 2012

ER -

An approach to synthesis of reversible circuits for partially specified functions

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Keywords

ASJC Scopus subject areas

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