An analytic steady-state current-voltage characteristics of short channel fully-depleted surrounding gate transistor (FD-SGT)

Tetsuo Endoh, Tairiku Nakamura, Fujio Masuoka

Research output: Contribution to journalArticle

40 Citations (Scopus)

Abstract

A steady-state current-voltage characteristics of fully-depleted surrounding gate transistor (FD-SGT) with short channel effects, such as threshold voltage lowering and channel length modulation, is analyzed. First, new threshold voltage model of FDSGT, which takes threshold voltage lowering caused by decreasing channel length into consideration, are proposed. We express surface potential as capacitance couple between channel and other electrodes such as gate, source and drain. And we analyze how surface potential distribution deviates from long channel surface potential distribution with source and drain effects when channel length becomes short. Next, by using newly proposed model, current-voltage characteristics equation with short channel effects is analytically formulated for the first time. In comparison with a three-dimensional (3D) device simulator, the results of newly proposed threshold voltage model show good agreement within 0.011 V average error. And newly formulated current-voltage characteristics equation also shows good agreement within 0.95% average error. The results of this work make it possible to clear the device designs of FD-SGT theoretically and show the new viewpoints for future ULSI's with SGT.

Original languageEnglish
Pages (from-to)911-916
Number of pages6
JournalIEICE Transactions on Electronics
VolumeE80-C
Issue number7
Publication statusPublished - 1997 Jan 1

Keywords

  • Current-voltage characteristics
  • FD-SGT
  • SCT
  • Short channel effect
  • Threshold voltage

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

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