An all-band TV tuner IC with an on-chin PLL and a high-voltage output stage is developed. The new self-aligned bipolar technology, called high-voltage compatible sidewall base contact structure (HV-SICOS), enables the integration of 1-GHz analog circuits, 1-GHz low-power ECL-I2L PLL circuits, and a 0.5- to 30-V tuning diode bias circuit on the same chip. The analog block of the all-band TV tuner IC has a VCO and mixer pair for the VHF/CATV and another pair for the UHF bands, a UHF input amplifier, an IF amplifier, and a VCO signal switching circuit. To suppress the digital noise level for mixed analog/digital mode operation, the PLL is constructed with high-speed ECL circuits for divide-by-4 and dual modulus prescalers, and low-power I2L circuits. An isolation area is placed between the analog and digital blocks, to suppress noise from the digital circuits. Conversion gain of 24 dB for VHF/ CATV and 33 dB for UHF, a noise figure of 10 dB, and 1% cross modulation of 95 dB • μV are obtained. This IC can operate in all TV bands with a total power dissipation of 200 mW on a 3-mm x 4-mm chip.
ASJC Scopus subject areas
- Electrical and Electronic Engineering