An all-band TV tuner IC with 10 GHz/100 V mixed analog/digital Si bipolar technology

Katsuyoshi Washio; Satoshi Tanaka; Takeaki Okabe; Katsuhiro Norisue; Toshio Nagashima; Seiichi Ueda

An all-band TV tuner IC with 10 GHz/100 V mixed analog/digital Si bipolar technology

Katsuyoshi Washio, Satoshi Tanaka, Takeaki Okabe, Katsuhiro Norisue, Toshio Nagashima, Seiichi Ueda

Research output: Contribution to journal › Conference article › peer-review

Abstract

A high-frequency mixed analog/digital Si bipolar circuit technology with high-voltage output stages that integrates 1-GHz analog circuits with 10-GHz cutoff frequencies, 1-GHz low-power emitter-coupled-logic/integrated-injection-logic phase-locked-loop (ECL/I²L PLL) circuits, and 100-V output circuits is discussed. A bipolar ECL/I²L technology is used because the small logic swings and current mode operations of ECL/I²L are better suited to the reduction of digital noise than CMOS. An advanced SICOS² technology that attains the performance required for consumer applications with reasonable cost is described. An all-band TV tuner IC with on-chip phase-locked loop (PLL) demonstrates the performance of this technology.

Original language	English
Pages (from-to)	98-99, 273
Journal	Digest of Technical Papers - IEEE International Solid-State Circuits Conference
Publication status	Published - 1990 Jul 1
Externally published	Yes
Event	1990 IEEE International Solid-State Circuits Conference - 37th ISSCC - San Francisco, CA, USA Duration: 1990 Feb 14 → 1990 Feb 16

ASJC Scopus subject areas

Electronic, Optical and Magnetic Materials
Electrical and Electronic Engineering

Cite this

@article{ff064ed872744dd7b55fdd6cc91897ee,

title = "An all-band TV tuner IC with 10 GHz/100 V mixed analog/digital Si bipolar technology",

abstract = "A high-frequency mixed analog/digital Si bipolar circuit technology with high-voltage output stages that integrates 1-GHz analog circuits with 10-GHz cutoff frequencies, 1-GHz low-power emitter-coupled-logic/integrated-injection-logic phase-locked-loop (ECL/I2L PLL) circuits, and 100-V output circuits is discussed. A bipolar ECL/I2L technology is used because the small logic swings and current mode operations of ECL/I2L are better suited to the reduction of digital noise than CMOS. An advanced SICOS2 technology that attains the performance required for consumer applications with reasonable cost is described. An all-band TV tuner IC with on-chip phase-locked loop (PLL) demonstrates the performance of this technology.",

author = "Katsuyoshi Washio and Satoshi Tanaka and Takeaki Okabe and Katsuhiro Norisue and Toshio Nagashima and Seiichi Ueda",

year = "1990",

month = jul,

day = "1",

language = "English",

pages = "98--99, 273",

journal = "Digest of Technical Papers - IEEE International Solid-State Circuits Conference",

issn = "0193-6530",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

note = "1990 IEEE International Solid-State Circuits Conference - 37th ISSCC ; Conference date: 14-02-1990 Through 16-02-1990",

}

TY - JOUR

T1 - An all-band TV tuner IC with 10 GHz/100 V mixed analog/digital Si bipolar technology

AU - Washio, Katsuyoshi

AU - Tanaka, Satoshi

AU - Okabe, Takeaki

AU - Norisue, Katsuhiro

AU - Nagashima, Toshio

AU - Ueda, Seiichi

PY - 1990/7/1

Y1 - 1990/7/1

N2 - A high-frequency mixed analog/digital Si bipolar circuit technology with high-voltage output stages that integrates 1-GHz analog circuits with 10-GHz cutoff frequencies, 1-GHz low-power emitter-coupled-logic/integrated-injection-logic phase-locked-loop (ECL/I2L PLL) circuits, and 100-V output circuits is discussed. A bipolar ECL/I2L technology is used because the small logic swings and current mode operations of ECL/I2L are better suited to the reduction of digital noise than CMOS. An advanced SICOS2 technology that attains the performance required for consumer applications with reasonable cost is described. An all-band TV tuner IC with on-chip phase-locked loop (PLL) demonstrates the performance of this technology.

AB - A high-frequency mixed analog/digital Si bipolar circuit technology with high-voltage output stages that integrates 1-GHz analog circuits with 10-GHz cutoff frequencies, 1-GHz low-power emitter-coupled-logic/integrated-injection-logic phase-locked-loop (ECL/I2L PLL) circuits, and 100-V output circuits is discussed. A bipolar ECL/I2L technology is used because the small logic swings and current mode operations of ECL/I2L are better suited to the reduction of digital noise than CMOS. An advanced SICOS2 technology that attains the performance required for consumer applications with reasonable cost is described. An all-band TV tuner IC with on-chip phase-locked loop (PLL) demonstrates the performance of this technology.

UR - http://www.scopus.com/inward/record.url?scp=0025451649&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=0025451649&partnerID=8YFLogxK

M3 - Conference article

AN - SCOPUS:0025451649

SN - 0193-6530

SP - 98-99, 273

JO - Digest of Technical Papers - IEEE International Solid-State Circuits Conference

JF - Digest of Technical Papers - IEEE International Solid-State Circuits Conference

T2 - 1990 IEEE International Solid-State Circuits Conference - 37th ISSCC

Y2 - 14 February 1990 through 16 February 1990

ER -

An all-band TV tuner IC with 10 GHz/100 V mixed analog/digital Si bipolar technology

Abstract

ASJC Scopus subject areas

Other files and links

Fingerprint

Cite this