An advanced NAND-structure cell technology for reliable 3.3 V 64 Mb electrically erasable and programmable read only memories (EEPROMs)

Seiichi Aritome; Ikuo Hatakeyama; Tetsuo Endoh; Tetsuya Yamaguchi; Susumu Shuto; Hirohisa Iizuka; Tooru Maruyama; Hiroshi Watanabe; Gertjan Hemink; Koji Sakui; Tomoharu Tanaka; Masaki Momodomi; Riichiro Shirota

doi:10.1143/JJAP.33.524

An advanced NAND-structure cell technology for reliable 3.3 V 64 Mb electrically erasable and programmable read only memories (EEPROMs)

Seiichi Aritome, Ikuo Hatakeyama, Tetsuo Endoh, Tetsuya Yamaguchi, Susumu Shuto, Hirohisa Iizuka, Tooru Maruyama, Hiroshi Watanabe, Gertjan Hemink, Koji Sakui, Tomoharu Tanaka, Masaki Momodomi, Riichiro Shirota

Research output: Contribution to journal › Article

3 Citations (Scopus)

Abstract

An extremely small NAND-structure cell of 1.13 μm² per bit, 80% of the smallest Flash memory cell reported so far [H. Kume et al.: IEEE Tech. Dig. IEDM (1992) p. 99l], has been developed in 0.4 μm technology. The chip size of a 64 Mb NAND electrically erasable and programmable read only memory (EEPROM) using this cell is estimated to be 120 mm², which is 60% that of a 64 Mb DRAM. In order to realize the small cell size, a 0.8 μm field isolation is used. A negative bias of – 0.5 V to the P-well of the memory cell is applied during writing. In addition, a bit-by-bit intelligent writing technology allows a 3.3 V data sensing scheme which can suppress read disturb to 1/1000 in comparison with the conventional 5 V scheme. As a result, it is expected that with this technology, 10⁶ write and erase cycles can be achieved and that the tunnel oxide can be scaled down from 10 nm to 8 nm.

Original language	English
Pages (from-to)	524-528
Number of pages	5
Journal	Japanese journal of applied physics
Volume	33
Issue number	1
DOIs	https://doi.org/10.1143/JJAP.33.524
Publication status	Published - 1994 Jan 1
Externally published	Yes

Keywords

EEPROM
Flash EEPROM
Isolation
NAND-structure EEPROM
Read disturb
Tunnel oxide

ASJC Scopus subject areas

Engineering(all)
Physics and Astronomy(all)

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10.1143/JJAP.33.524

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Aritome, S., Hatakeyama, I., Endoh, T., Yamaguchi, T., Shuto, S., Iizuka, H., Maruyama, T., Watanabe, H., Hemink, G., Sakui, K., Tanaka, T., Momodomi, M., & Shirota, R. (1994). An advanced NAND-structure cell technology for reliable 3.3 V 64 Mb electrically erasable and programmable read only memories (EEPROMs). Japanese journal of applied physics, 33(1), 524-528. https://doi.org/10.1143/JJAP.33.524

An advanced NAND-structure cell technology for reliable 3.3 V 64 Mb electrically erasable and programmable read only memories (EEPROMs). / Aritome, Seiichi; Hatakeyama, Ikuo; Endoh, Tetsuo; Yamaguchi, Tetsuya; Shuto, Susumu; Iizuka, Hirohisa; Maruyama, Tooru; Watanabe, Hiroshi; Hemink, Gertjan; Sakui, Koji; Tanaka, Tomoharu; Momodomi, Masaki; Shirota, Riichiro.

In: Japanese journal of applied physics, Vol. 33, No. 1, 01.01.1994, p. 524-528.

Research output: Contribution to journal › Article

Aritome, S, Hatakeyama, I, Endoh, T, Yamaguchi, T, Shuto, S, Iizuka, H, Maruyama, T, Watanabe, H, Hemink, G, Sakui, K, Tanaka, T, Momodomi, M & Shirota, R 1994, 'An advanced NAND-structure cell technology for reliable 3.3 V 64 Mb electrically erasable and programmable read only memories (EEPROMs)', Japanese journal of applied physics, vol. 33, no. 1, pp. 524-528. https://doi.org/10.1143/JJAP.33.524

Aritome, Seiichi ; Hatakeyama, Ikuo ; Endoh, Tetsuo ; Yamaguchi, Tetsuya ; Shuto, Susumu ; Iizuka, Hirohisa ; Maruyama, Tooru ; Watanabe, Hiroshi ; Hemink, Gertjan ; Sakui, Koji ; Tanaka, Tomoharu ; Momodomi, Masaki ; Shirota, Riichiro. / An advanced NAND-structure cell technology for reliable 3.3 V 64 Mb electrically erasable and programmable read only memories (EEPROMs). In: Japanese journal of applied physics. 1994 ; Vol. 33, No. 1. pp. 524-528.

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abstract = "An extremely small NAND-structure cell of 1.13 μm2 per bit, 80% of the smallest Flash memory cell reported so far [H. Kume et al.: IEEE Tech. Dig. IEDM (1992) p. 99l], has been developed in 0.4 μm technology. The chip size of a 64 Mb NAND electrically erasable and programmable read only memory (EEPROM) using this cell is estimated to be 120 mm2, which is 60% that of a 64 Mb DRAM. In order to realize the small cell size, a 0.8 μm field isolation is used. A negative bias of – 0.5 V to the P-well of the memory cell is applied during writing. In addition, a bit-by-bit intelligent writing technology allows a 3.3 V data sensing scheme which can suppress read disturb to 1/1000 in comparison with the conventional 5 V scheme. As a result, it is expected that with this technology, 106 write and erase cycles can be achieved and that the tunnel oxide can be scaled down from 10 nm to 8 nm.",

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