Abstract
The effect of Ta doping on the growth of the SiOx layer in YSZ/Si gate dielectrics has been investigated by Analytical TEM (AEM) method. Most part of the YTaSZ layer has epitaxially grown like as YSZ layer. Capacitance-voltage (C-V) hysteresis of YTaSZ film has been suppressed perfectly. It has been, however, that the SiOx thickness of Ta doped YSZ/Si became thicker than YSZ/Si, and that the roughness of the interface between SiOx/Si has been increased. Density of interface trapped charge has been also increased. HRTEM and TEM-EDS analysis has revealed that some of the doped Ta was diffused into SiOx interface layer and the surface of Si substrate, which is thought to be the cause of interface trapped charge.
Original language | English |
---|---|
Pages (from-to) | 237-240 |
Number of pages | 4 |
Journal | Key Engineering Materials |
Volume | 269 |
Publication status | Published - 2004 Jan 1 |
Externally published | Yes |
Event | Proceedings of the 23rd Electronics Division Meeting of the Ceramic Society of Japan - Kawasaki, Japan Duration: 2003 Oct 23 → 2003 Oct 24 |
Keywords
- Buffer layer
- C-V characteristics
- Depth profile
- Interface trapped charge
- SiO
- TEM
- TaO
- Zirconia
ASJC Scopus subject areas
- Materials Science(all)
- Mechanics of Materials
- Mechanical Engineering