Advanced TiN metal-gate FinFET technology

Y. X. Liu, E. Sugimata, T. Matsukawa, M. Masahara, Kazuhiko Endo, K. Ishii, T. Shimizu, H. Yamauchi, S. O'uchi, Eiichi Suzuki

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

The TiN-gate CMOS FinFET technologies for high-performance connected-double-gate 3-terminal (3T) and flexible threshold voltage (V th) controllable independent-double-gate 4-terminal (4T) FinFETs integration have experimentally been investigated. By using the conventional reactive sputtering, the uniform TiN deposition on the sidewalls of upstanding Si-fin channels was realized by optimizing the pressure during the sputtering. Moreover, the well symmetrical Vth, N- and P-channel 3T-FinFETs with the fin-height tuning and the co-integration of the TiN-gated high-performance 3T- and highly Vth-controllable 4T-FinFETs using the resist etch-back process were demonstrated. The developed technologies are very attractive for the high-performance and power-managed CMOS FinFETs circuits. Copyright The Electrochemical Society.

Original languageEnglish
Title of host publicationDielectrics for Nanosystems II
Subtitle of host publicationMaterials Science, Processing, Reliability, and Manufacturing
Pages197-208
Number of pages12
Edition1
Publication statusPublished - 2006 Jul 3
Externally publishedYes
Event2nd International Symposium on Dielectrics for Nanosystems: Materials Science, Processing, Reliability, and Manufacturing - 209th Meeting of the Electrochemical Society - Denver, CO, United States
Duration: 2006 May 72006 May 12

Publication series

NameECS Transactions
Number1
Volume2
ISSN (Print)1938-5862
ISSN (Electronic)1938-6737

Other

Other2nd International Symposium on Dielectrics for Nanosystems: Materials Science, Processing, Reliability, and Manufacturing - 209th Meeting of the Electrochemical Society
Country/TerritoryUnited States
CityDenver, CO
Period06/5/706/5/12

ASJC Scopus subject areas

  • Engineering(all)

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