Accurate and high-speed asynchronous network-on-chip simulation using physical wire-delay information

Mathematics

• Network on chip 100%
• Physical Simulation 85%
• High Speed 61%
• Simulator 51%
• Performance Evaluation 26%
• Router 14%
• Latency 13%
• Throughput 12%
• High Performance 12%
• Simulation 12%
• Design 12%
• Physical Model 12%
• Injection 11%
• Architecture 11%
• Mesh 7%
• Evaluation 7%
• Unit 6%

Engineering & Materials Science

• Network-on-chip 56%
• Wire 37%
• Simulators 36%
• Routers 11%
• Transistors 10%
• Computer aided design 10%
• Throughput 8%
• Networks (circuits) 6%