This paper introduces an accuracy/energy-flexible configurable 2D Gabor filter based on stochastic computation, where bit streams representing information are used. The Gabor filters show a powerful feature extraction capability, but the calculation based on binary computation is complicated. As opposed to traditional memory-based methods that use fixed Gabor coefficients calculated by software in advance, the proposed circuit dynamically generates the coefficients with small hardware, thanks to stochastic computation. The on-line coefficient-generation method leads to the "Instant-On" and hence the power-gating capabilities. For energy-efficient circuits, dynamic voltage-frequency-length scaling (DVFLS) is proposed to match the performance demands depending on situations. DVFLS controls the lengths of the stochastic bit streams with voltage and frequency, which can lower the energy dissipation and/or increase the throughput with a little accuracy loss. The proposed 64 parallel stochastic Gabor filter is fabricated using TSMC 65 nm CMOS technology with a size of 1.79 mm × 1.79 mm. The measurement results with DVFLS show a 200 Mpixel/s and a 0.510 μJ/pixel, exhibiting 16x higher and 3x lower than that using a conventional DVFS technique, respectively, with a 0.586% accuracy loss. Compared with a conventional configurable Gabor filter, the proposed chip achieves an order-of-magnitude higher throughput with more flexibility of the Gabor coefficients.