TY - GEN
T1 - Accuracy enhancement of sub-mm chip self-alignment using liquid surface tension for hybrid integration
AU - Kikuta, Shinya
AU - Hoshino, Satohiko
AU - Yamanishi, Yoshiki
AU - Fukushima, Takafumi
AU - Lee, Kangwook
AU - Koyanagi, Mitsumasa
PY - 2016/12/16
Y1 - 2016/12/16
N2 - A self-alignment process of sub-mm chips is studied for hybrid integration toward silicon photonics applications. Capillary forces by liquid surface tension drive the tiny chips to precisely and quickly align on silicon wafers. Self-alignment behaviors and the resulting high accuracies of the sub-mm chips are discussed in this work.
AB - A self-alignment process of sub-mm chips is studied for hybrid integration toward silicon photonics applications. Capillary forces by liquid surface tension drive the tiny chips to precisely and quickly align on silicon wafers. Self-alignment behaviors and the resulting high accuracies of the sub-mm chips are discussed in this work.
UR - http://www.scopus.com/inward/record.url?scp=85010653971&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=85010653971&partnerID=8YFLogxK
U2 - 10.1364/cleo_si.2016.sm2g.2
DO - 10.1364/cleo_si.2016.sm2g.2
M3 - Conference contribution
AN - SCOPUS:85010653971
T3 - 2016 Conference on Lasers and Electro-Optics, CLEO 2016
BT - 2016 Conference on Lasers and Electro-Optics, CLEO 2016
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2016 Conference on Lasers and Electro-Optics, CLEO 2016
Y2 - 5 June 2016 through 10 June 2016
ER -