ABSENCE OF SIDE-GATING IN InP MISFET INTEGRATED CIRCUITS.

H. Hasegawa, T. Kitagawa, H. Masuda, H. Yano, H. Ohno

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

It is shown that InP MISFETs are virtually free from the side-gating effect under normal dark operating condition. In order to understand the difference in the side-gating behavior of InP MISFETs and GaAs MESFETs, a detailed study on the surface I-V characteristics was carried out. It is concluded that the difference is because of the low surface state density in InP.

Original languageEnglish
Title of host publicationConference on Solid State Devices and Materials
PublisherJapan Soc of Applied Physics
Pages425-428
Number of pages4
ISBN (Print)4930813107
Publication statusPublished - 1985 Dec 1
Externally publishedYes

Publication series

NameConference on Solid State Devices and Materials

ASJC Scopus subject areas

  • Engineering(all)

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  • Cite this

    Hasegawa, H., Kitagawa, T., Masuda, H., Yano, H., & Ohno, H. (1985). ABSENCE OF SIDE-GATING IN InP MISFET INTEGRATED CIRCUITS. In Conference on Solid State Devices and Materials (pp. 425-428). (Conference on Solid State Devices and Materials). Japan Soc of Applied Physics.