A unique and accurate extraction technique of the asymmetric bottom-pillar resistance for the vertical MOSFET

Koji Sakui, Tetsuo Endoh

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

The concept of the measurement technique is to separate the paths by at least two directions; one is the current path, where the drain current flows, and the other is the noncurrent path, where the voltage is measured with the connection to the high-Z gate of the monitor circuit. The proposed measurement technique has been validated by HSPICE simulation.

Original languageEnglish
Title of host publication2010 International Conference on Microelectronic Test Structures, 23rd IEEE ICMTS Conference Proceedings
Pages220-224
Number of pages5
DOIs
Publication statusPublished - 2010 Jun 29
Event2010 International Conference on Microelectronic Test Structures, ICMTS 2010 - Hiroshima, Japan
Duration: 2010 Mar 222010 Mar 25

Publication series

NameIEEE International Conference on Microelectronic Test Structures

Other

Other2010 International Conference on Microelectronic Test Structures, ICMTS 2010
CountryJapan
CityHiroshima
Period10/3/2210/3/25

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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