TY - JOUR
T1 - A Unified Approach to Submicron DC MOS Transistor Modeling for Low-Voltage ICs
AU - Jen, Steve H.
AU - Sheu, Bing J.
AU - Oshima, Yoichi
N1 - Copyright:
Copyright 2018 Elsevier B.V., All rights reserved.
PY - 1997
Y1 - 1997
N2 - A unified single-equation approach for the MOS transistor drain current modeling for energy-efficient submicron MOS circuits is presented. Instead of three sets of separate equations for the triode, saturation, and weak inversion regions, only a continuous expression which is valid to describe the behavior of drain current and the derivatives in all operation regions can be realized by using a combination of hyperbola, sigmoid, and interpolation methods. The model expression can predict accurate results for the current, output conductance, and transconduclance with continuous and smooth characteristics. The simulation results agree well with experimental data.
AB - A unified single-equation approach for the MOS transistor drain current modeling for energy-efficient submicron MOS circuits is presented. Instead of three sets of separate equations for the triode, saturation, and weak inversion regions, only a continuous expression which is valid to describe the behavior of drain current and the derivatives in all operation regions can be realized by using a combination of hyperbola, sigmoid, and interpolation methods. The model expression can predict accurate results for the current, output conductance, and transconduclance with continuous and smooth characteristics. The simulation results agree well with experimental data.
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U2 - 10.1023/A:1008212908346
DO - 10.1023/A:1008212908346
M3 - Article
AN - SCOPUS:0031078045
VL - 12
SP - 107
EP - 118
JO - Analog Integrated Circuits and Signal Processing
JF - Analog Integrated Circuits and Signal Processing
SN - 0925-1030
IS - 2
ER -