A three-dimensional instrumentation VLSI processor based on a concurrent memory-access scheme

Seunghwan Lee, Masanori Hariyama, Michitaka Kameyama

Research output: Contribution to journalArticlepeer-review

5 Citations (Scopus)

Abstract

Three-dimensional (3-D) instrumentation using an image sequence is a promising instrumentation method for intelligent systems in which accurate 3-D information is required. However, real-time instrumentation is difficult since much computation time and a large memory bandwidth are required. In this paper, a 3-D instrumentation VLSI processor with a concurrent memory-access scheme is proposed. To reduce the access time, frequently used data are stored in a cache register array and are concurrently transferred to processing elements using simple interconnections to the 8-nearest neighbor registers. Based on a row and column memory access pattern, we propose a diagonally interleaved frame memory by which pixel values of a row and column are stored across memory modules. Based on the concurrent memory-access scheme, a 40 GOPS vprocessor is designed and the delay time for the instrumentation is estimated to be 42ms for a 256×256 images.

Original languageEnglish
Pages (from-to)1491-1497
Number of pages7
JournalIEICE Transactions on Electronics
VolumeE80-C
Issue number11
Publication statusPublished - 1997 Jan 1

Keywords

  • 3-d instrumentation
  • Block matching algorithm
  • Epipolar constraint
  • Memory interleaving
  • Special-purpose VLSI processor

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

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