A technology for reducing flicker noise for ULSI applications

Koutarou Tanaka, Kazufumi Watanabe, Hideaki Ishino, Shigetoshi Sugawa, Akinobu Teramoto, Masaki Hirayama, Tadahiro Ohmi

Research output: Contribution to journalArticlepeer-review

23 Citations (Scopus)


It is demonstrated that the formation of the atomic scale flattened Si/SiO2 interface is effective in reducing the Flicker noise in n-channel metal oxide semiconductor field effect transistors (n-MOSFETs). The atomic scale flattened Si/SiO2 interface is realized, the atomic scale flattened silicon surface is obtained by the HF/HCl wet-etching process, and then the silicon surface is oxidized by radicals generated in Kr/O2 mixed high-density microwave-excited plasma at 400°C. Applying these techniques, the trap density at the Si/SiO2 interface is markedly reduced since the surface roughness is minimized and Flicker noise is markedly reduced as compared with the conventional process.

Original languageEnglish
Pages (from-to)2106-2109
Number of pages4
JournalJapanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers
Issue number4 B
Publication statusPublished - 2003 Apr


  • AFM
  • Atomic scale flattening
  • Flicker noise
  • High-density plasma
  • Radical oxidation
  • STM
  • Surface roughness

ASJC Scopus subject areas

  • Engineering(all)
  • Physics and Astronomy(all)


Dive into the research topics of 'A technology for reducing flicker noise for ULSI applications'. Together they form a unique fingerprint.

Cite this