@inproceedings{1a0b2af894ea40aeb9f76933b005b127,
title = "A surrounding isolation-merged plate electrode (SIMPLE) cell with checkered layout for 256 Mbit DRAMs and beyond",
abstract = "The authors describe a novel cell structure called a surrounding isolation merged plate electrode (SIMPLE) cell. In this cell, close-packed silicon pillars are laid out checker-wise, and a thin isolation-merged plate electrode surrounds the pillars. This cell structure leads to cell area reduction to 50%, trench depth reduction to 50%, and planarization and process step reduction compared with the conventional trench type cell. Using the design rule of 64 Mbit DRAM (dynamic RAM) (0.35 μ m), the SIMPLE cell can achieve a cell area of 256 Mbit DRAM (0.5 μ m2). The SIMPLE cell is an attractive candidate for 256 Mbit DRAMs and beyond.",
keywords = "Capacitors, Electrodes, Etching, Fabrication, Lithography, Oxidation, Planarization, Random access memory, Silicon, Ultra large scale integration",
author = "T. Ozaki and A. Nitayama and K. Sunouchi and H. Takato and S. Takedai and A. Yagishita and K. Hieda and F. Horiguchi",
year = "1991",
month = jan,
day = "1",
doi = "10.1109/IEDM.1991.235354",
language = "English",
series = "Technical Digest - International Electron Devices Meeting, IEDM",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
pages = "469--472",
booktitle = "International Electron Devices Meeting 1991, IEDM 1991",
note = "International Electron Devices Meeting, IEDM 1991 ; Conference date: 08-12-1991 Through 11-12-1991",
}