A surrounding isolation-merged plate electrode (SIMPLE) cell with checkered layout for 256 Mbit DRAMs and beyond

T. Ozaki, A. Nitayama, K. Sunouchi, H. Takato, S. Takedai, A. Yagishita, K. Hieda, F. Horiguchi

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Abstract

The authors describe a novel cell structure called a surrounding isolation merged plate electrode (SIMPLE) cell. In this cell, close-packed silicon pillars are laid out checker-wise, and a thin isolation-merged plate electrode surrounds the pillars. This cell structure leads to cell area reduction to 50%, trench depth reduction to 50%, and planarization and process step reduction compared with the conventional trench type cell. Using the design rule of 64 Mbit DRAM (dynamic RAM) (0.35 μ m), the SIMPLE cell can achieve a cell area of 256 Mbit DRAM (0.5 μ m2). The SIMPLE cell is an attractive candidate for 256 Mbit DRAMs and beyond.

Original languageEnglish
Title of host publicationInternational Electron Devices Meeting 1991, IEDM 1991
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages469-472
Number of pages4
ISBN (Electronic)0780302435
DOIs
Publication statusPublished - 1991 Jan 1
EventInternational Electron Devices Meeting, IEDM 1991 - Washington, United States
Duration: 1991 Dec 81991 Dec 11

Publication series

NameTechnical Digest - International Electron Devices Meeting, IEDM
Volume1991-January
ISSN (Print)0163-1918

Other

OtherInternational Electron Devices Meeting, IEDM 1991
CountryUnited States
CityWashington
Period91/12/891/12/11

Keywords

  • Capacitors
  • Electrodes
  • Etching
  • Fabrication
  • Lithography
  • Oxidation
  • Planarization
  • Random access memory
  • Silicon
  • Ultra large scale integration

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Condensed Matter Physics
  • Electrical and Electronic Engineering
  • Materials Chemistry

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