A sub-10-ns 16 × 16 multiplier using 0.6-µm CMOS technology

Yukihito Oowaki, Kenji Numata, Kenji Tsuchiya, Kazushi Tsuda, Hiroshi Takato, Naoko Takenouchi, Akihiro Nitayama, Takayuki Kobayashi, Masahiko Chiba, Shigeyoshi Watanabe, Kazunori Ohuchi, Akimichi Hojo

Research output: Chapter in Book/Report/Conference proceedingChapter

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Mathematics