A study on direct RF undersampling receiver configuration considering timing skew spurs using time-interleaved ADC

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

In this paper, we have studied the configuration of direct RF undersampling receiver using a time interleaved ADC (TI-ADC). In the case of higher order undersampling reception, the power levels of spurious due to the timing skew error of TI-ADC become higher than Nyquist sampling reception. We show that by adding an external sample and hold (S/H) IC in front of the TI-ADC, the spurious generated by the timing skew error can be reduced. The experimental result, using 920MHz-band undersampling receiver with 500MHz sampling clock, shows that the proposed configuration (with external S/H IC type) improves the maximum SFDR by 27 dB compared with the conventional one (no external S/H IC type).

Original languageEnglish
Title of host publication2018 Asia-Pacific Microwave Conference, APMC 2018 - Proceedings
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages1525-1527
Number of pages3
ISBN (Electronic)9784902339451
DOIs
Publication statusPublished - 2019 Jan 16
Event30th Asia-Pacific Microwave Conference, APMC 2018 - Kyoto, Japan
Duration: 2018 Nov 62018 Nov 9

Publication series

NameAsia-Pacific Microwave Conference Proceedings, APMC
Volume2018-November

Conference

Conference30th Asia-Pacific Microwave Conference, APMC 2018
CountryJapan
CityKyoto
Period18/11/618/11/9

Keywords

  • Direct RF undersampling
  • Hold circuit
  • Sample
  • Time-Interleaved ADC

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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