A study of multiple-valued magnetoresistive RAM (MRAM) using binary MTJ devices

Hiromitsu Kimura; Kostas Pagiamtzis; Ali Sheikholeslami; Takahiro Hanyu

A study of multiple-valued magnetoresistive RAM (MRAM) using binary MTJ devices

Hiromitsu Kimura, Kostas Pagiamtzis, Ali Sheikholeslami, Takahiro Hanyu

Systems & Software Division

Research output: Contribution to journal › Conference article › peer-review

4 Citations (Scopus)

Abstract

This paper presents four-valued magnetoresistive RAM (MRAM) storage cells using one access transistor and two binary magnetic tunnel junction (MTJ) devices with the MTJ devices either in series or in parallel. We present a comparative study of the two cells in terms of their area and power benefits over the binary MRAM, all using the same conventional MRAM process.

Original language	English
Pages (from-to)	340-345
Number of pages	6
Journal	Proceedings of The International Symposium on Multiple-Valued Logic
Publication status	Published - 2004 Jul 26
Event	Proceedings - 34th International Symposium on Multiple-Values Logic, ISMVL 2004 - Toronto, Ont, Canada Duration: 2004 May 19 → 2004 May 22

ASJC Scopus subject areas

Hardware and Architecture
Logic
Safety, Risk, Reliability and Quality
Chemical Health and Safety

Cite this

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title = "A study of multiple-valued magnetoresistive RAM (MRAM) using binary MTJ devices",

abstract = "This paper presents four-valued magnetoresistive RAM (MRAM) storage cells using one access transistor and two binary magnetic tunnel junction (MTJ) devices with the MTJ devices either in series or in parallel. We present a comparative study of the two cells in terms of their area and power benefits over the binary MRAM, all using the same conventional MRAM process.",

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AU - Kimura, Hiromitsu

AU - Pagiamtzis, Kostas

AU - Sheikholeslami, Ali

AU - Hanyu, Takahiro

PY - 2004/7/26

Y1 - 2004/7/26

N2 - This paper presents four-valued magnetoresistive RAM (MRAM) storage cells using one access transistor and two binary magnetic tunnel junction (MTJ) devices with the MTJ devices either in series or in parallel. We present a comparative study of the two cells in terms of their area and power benefits over the binary MRAM, all using the same conventional MRAM process.

AB - This paper presents four-valued magnetoresistive RAM (MRAM) storage cells using one access transistor and two binary magnetic tunnel junction (MTJ) devices with the MTJ devices either in series or in parallel. We present a comparative study of the two cells in terms of their area and power benefits over the binary MRAM, all using the same conventional MRAM process.

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M3 - Conference article

AN - SCOPUS:3142730807

SP - 340

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JO - Proceedings of The International Symposium on Multiple-Valued Logic

JF - Proceedings of The International Symposium on Multiple-Valued Logic

SN - 0195-623X

T2 - Proceedings - 34th International Symposium on Multiple-Values Logic, ISMVL 2004

Y2 - 19 May 2004 through 22 May 2004

ER -

A study of multiple-valued magnetoresistive RAM (MRAM) using binary MTJ devices

Abstract

ASJC Scopus subject areas

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