A study of multiple-valued magnetoresistive RAM (MRAM) using binary MTJ devices

Hiromitsu Kimura; Kostas Pagiamtzis; Ali Sheikholeslami; Takahiro Hanyu

A study of multiple-valued magnetoresistive RAM (MRAM) using binary MTJ devices

Hiromitsu Kimura, Kostas Pagiamtzis, Ali Sheikholeslami, Takahiro Hanyu

Systems & Software Division

Research output: Contribution to journal › Conference article › peer-review

3 Citations (Scopus)

Abstract

This paper presents four-valued magnetoresistive RAM (MRAM) storage cells using one access transistor and two binary magnetic tunnel junction (MTJ) devices with the MTJ devices either in series or in parallel. We present a comparative study of the two cells in terms of their area and power benefits over the binary MRAM, all using the same conventional MRAM process.

Original language	English
Pages (from-to)	340-345
Number of pages	6
Journal	Proceedings of The International Symposium on Multiple-Valued Logic
Publication status	Published - 2004 Jul 26
Event	Proceedings - 34th International Symposium on Multiple-Values Logic, ISMVL 2004 - Toronto, Ont, Canada Duration: 2004 May 19 → 2004 May 22

ASJC Scopus subject areas

Hardware and Architecture
Logic
Safety, Risk, Reliability and Quality
Chemical Health and Safety

Access to Document

Fingerprint Dive into the research topics of 'A study of multiple-valued magnetoresistive RAM (MRAM) using binary MTJ devices'. Together they form a unique fingerprint.

Cite this

@article{86ba9be623124ad39a4d9814722ae10e,

title = "A study of multiple-valued magnetoresistive RAM (MRAM) using binary MTJ devices",

abstract = "This paper presents four-valued magnetoresistive RAM (MRAM) storage cells using one access transistor and two binary magnetic tunnel junction (MTJ) devices with the MTJ devices either in series or in parallel. We present a comparative study of the two cells in terms of their area and power benefits over the binary MRAM, all using the same conventional MRAM process.",

author = "Hiromitsu Kimura and Kostas Pagiamtzis and Ali Sheikholeslami and Takahiro Hanyu",

year = "2004",

month = jul,

day = "26",

language = "English",

pages = "340--345",

journal = "Proceedings of The International Symposium on Multiple-Valued Logic",

issn = "0195-623X",

publisher = "IEEE Computer Society",

note = "Proceedings - 34th International Symposium on Multiple-Values Logic, ISMVL 2004 ; Conference date: 19-05-2004 Through 22-05-2004",

}

TY - JOUR

T1 - A study of multiple-valued magnetoresistive RAM (MRAM) using binary MTJ devices

AU - Kimura, Hiromitsu

AU - Pagiamtzis, Kostas

AU - Sheikholeslami, Ali

AU - Hanyu, Takahiro

PY - 2004/7/26

Y1 - 2004/7/26

N2 - This paper presents four-valued magnetoresistive RAM (MRAM) storage cells using one access transistor and two binary magnetic tunnel junction (MTJ) devices with the MTJ devices either in series or in parallel. We present a comparative study of the two cells in terms of their area and power benefits over the binary MRAM, all using the same conventional MRAM process.

AB - This paper presents four-valued magnetoresistive RAM (MRAM) storage cells using one access transistor and two binary magnetic tunnel junction (MTJ) devices with the MTJ devices either in series or in parallel. We present a comparative study of the two cells in terms of their area and power benefits over the binary MRAM, all using the same conventional MRAM process.

UR - http://www.scopus.com/inward/record.url?scp=3142730807&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=3142730807&partnerID=8YFLogxK

M3 - Conference article

AN - SCOPUS:3142730807

SP - 340

EP - 345

JO - Proceedings of The International Symposium on Multiple-Valued Logic

JF - Proceedings of The International Symposium on Multiple-Valued Logic

SN - 0195-623X

T2 - Proceedings - 34th International Symposium on Multiple-Values Logic, ISMVL 2004

Y2 - 19 May 2004 through 22 May 2004

ER -