## Abstract

This paper presents a model-based study of SET (Single-Electron-Transistor) logic gate family for synthesizing binary, MV (Multiple-Valued) and mixed-mode logic circuits. The use of SETs combined with MOS transistors allows compact realization of basic logic functions that exhibit periodic transfer characteristics. The operation of basic SET logic gates is successfully confirmed through SPICE circuit simulation based on the physical device model of SETs. The proposed SET logic gates are useful for implementing binary logic circuits, MV logic circuits and binary-MV mixed-mode logic circuits in a highly flexible manner. As an example, this paper describes design of various parallel counters for carry-propagation-free arithmetic, where MV signals are effectively used to achieve higher functionality with lower hardware complexity.

Original language | English |
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Pages (from-to) | 1827-1836 |

Number of pages | 10 |

Journal | IEICE Transactions on Electronics |

Volume | E87-C |

Issue number | 11 |

Publication status | Published - 2004 Nov |

## Keywords

- Logic circuits
- Multiple-valued logic
- Parallel counters
- Quantum devices
- Single-electron transistors

## ASJC Scopus subject areas

- Electronic, Optical and Magnetic Materials
- Electrical and Electronic Engineering