### Abstract

This paper presents a model-based study of SET (Single-Electron-Transistor) logic gate family for synthesizing binary and MV (Multiple-Valued) logic circuits: The use of SETs combined with MOS transistors allows a compact realization of basic logic functions that exhibit periodic transfer characteristics. These basic SET logic gates are useful for implementing binary logic circuits, MV logic circuits and binary-MV-mixed logic circuits in a highly flexible manner. As an example, this paper describes the design of various parallel counters for carry-propagation-free arithmetic, where MV signals are effectively used to achieve higher functionality with lower hardware complexity.

Original language | English |
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Pages (from-to) | 262-268 |

Number of pages | 7 |

Journal | Proceedings of The International Symposium on Multiple-Valued Logic |

Publication status | Published - 2004 Jul 26 |

Event | Proceedings - 34th International Symposium on Multiple-Values Logic, ISMVL 2004 - Toronto, Ont, Canada Duration: 2004 May 19 → 2004 May 22 |

### ASJC Scopus subject areas

- Computer Science(all)
- Mathematics(all)

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## Cite this

*Proceedings of The International Symposium on Multiple-Valued Logic*, 262-268.