A single-chip transceiver large scale integration (LSI) was described with transmitter, receiver, data loop-back from receiver to transmitter at higher level of integration. The LSI comprised of PLL, control circuits, 16-channel input first in first out (FIFO), 16:1 mux, data input decision circuit, clock and data recovery (CDR) circuit, 1:16 demux, a generator. The transceiver LSI showed best characteristics for operating at low supply voltage with low power dissipation.
|Journal||Digest of Technical Papers - IEEE International Solid-State Circuits Conference|
|Publication status||Published - 2001 Jan 1|
|Event||Digest of Technical Papers - IEEE International Solid-State Circuits Conference - |
Duration: 2001 Feb 5 → 2001 Feb 6
ASJC Scopus subject areas
- Electronic, Optical and Magnetic Materials
- Electrical and Electronic Engineering