TY - GEN
T1 - A simplified distribution parasitic capacitance model for on-chip spiral inductors
AU - Masuda, Toru
AU - Kodama, Akihiro
AU - Nakamura, Takahiro
AU - Shiramizu, Nobuhiro
AU - Wada, Shin Ichiro
AU - Hashimoto, Takashi
AU - Washio, Katsuyoshi
PY - 2006/12/1
Y1 - 2006/12/1
N2 - A modeling methodology for determining simply distributed parasitic capacitances used in a lumped equivalent circuit of silicon monolithic spiral inductors is proposed. To calculate the capacitances for the obtained model, the degeneration factors for the total amount of distributed parasitic-capacitances are introduced. A Q-factor modeling-error of less than 9.4% was obtained by comparing the measured and modeled characteristics in the microwave region.
AB - A modeling methodology for determining simply distributed parasitic capacitances used in a lumped equivalent circuit of silicon monolithic spiral inductors is proposed. To calculate the capacitances for the obtained model, the degeneration factors for the total amount of distributed parasitic-capacitances are introduced. A Q-factor modeling-error of less than 9.4% was obtained by comparing the measured and modeled characteristics in the microwave region.
KW - Equivalent circuit model
KW - Parasitic capacitance
KW - Silicon substrate
KW - Spiral inductor
UR - http://www.scopus.com/inward/record.url?scp=33847032554&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=33847032554&partnerID=8YFLogxK
U2 - 10.1109/SMIC.2005.1587920
DO - 10.1109/SMIC.2005.1587920
M3 - Conference contribution
AN - SCOPUS:33847032554
SN - 0780394720
SN - 9780780394728
T3 - 2006 Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems - Digest of Papers
SP - 111
EP - 114
BT - 2006 Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems - Digest of Papers
T2 - 2006 Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems
Y2 - 18 January 2006 through 20 January 2006
ER -