A schmitt trigger based SRAM with vertical MOSFET

Hyoungjun Na, Tetsuo Endoh

Research output: Contribution to journalArticle

2 Citations (Scopus)

Abstract

In this paper, a Schmitt Trigger based 10T SRAM (ST 10T SRAM) cell with the vertical MOSFET is proposed for low supply voltage operation, and its impacts on cell size, stability and speed performance are investigated. The proposed ST 10T SRAM cell with the vertical MOSFET achieves smaller cell size than the ST 10T SRAM cell with the conventional planar MOSFET. Moreover, the proposed SRAM cell realizes large and constant static noise margin (SNM) against bottom node resistance of the vertical MOSFET without any architectural changes from the present 6T SRAM architecture. The proposed SRAM cell also suppresses the degradation of the read time of the ST 10T SRAM cell due to the backbias effect free characteristic of the vertical MOSFET. The proposed ST 10T SRAM cell with the vertical MOSFET is a superior SRAM cell for low supply voltage operation with a small cell size, stable operation, and fast speed performance with the present 6T SRAM architecture.

Original languageEnglish
Pages (from-to)792-801
Number of pages10
JournalIEICE Transactions on Electronics
VolumeE95-C
Issue number5
DOIs
Publication statusPublished - 2012 May

Keywords

  • 6T SRAM
  • Cell size
  • Read current
  • Read time
  • Schmitt Trigger based SRAM (ST SRAM)
  • Speed performance
  • Stability
  • Static noise margin (SNM)
  • Vertical MOSFET

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

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